Show patches with: State = Action Required       |    Archived = No       |   426143 patches
« 1 2 ... 1252 1253 1254 … 4261 4262 »
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2,1/4] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-12 Frank Chang New
[4/4] hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-10 Frank Chang New
[3/4] hw/dma: sifive_pdma: allow non-multiple transaction size transactions hw/dma: Align SiFive PDMA behavior with real hardware - - 2 2 --- 2021-09-10 Frank Chang New
[2/4] hw/dma: sifive_pdma: claim bit must be set before DMA transactions hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-10 Frank Chang New
[1/4] hw/dma: sifive_pdma: reset Next* registers when Control.claim is set hw/dma: Align SiFive PDMA behavior with real hardware - - 1 2 --- 2021-09-10 Frank Chang New
[v6,17/17] target/riscv: rvb: add b-ext version cpu option support subsets of bitmanip extension - - 1 - --- 2021-05-05 Frank Chang New
[v6,16/17] target/riscv: rvb: support and turn on B-extension from command line support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,15/17] target/riscv: rvb: add/shift with prefix zero-extend support subsets of bitmanip extension - - 1 - --- 2021-05-05 Frank Chang New
[v6,14/17] target/riscv: rvb: address calculation support subsets of bitmanip extension - - 1 - --- 2021-05-05 Frank Chang New
[v6,13/17] target/riscv: rvb: generalized or-combine support subsets of bitmanip extension - - 1 - --- 2021-05-05 Frank Chang New
[v6,12/17] target/riscv: rvb: generalized reverse support subsets of bitmanip extension - - 1 - --- 2021-05-05 Frank Chang New
[v6,11/17] target/riscv: rvb: rotate (left/right) support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,10/17] target/riscv: rvb: shift ones support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,09/17] target/riscv: rvb: single-bit instructions support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,08/17] target/riscv: add gen_shifti() and gen_shiftiw() helper functions support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,07/17] target/riscv: rvb: sign-extend instructions support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,06/17] target/riscv: rvb: min/max instructions support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,05/17] target/riscv: rvb: pack two words into one register support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,04/17] target/riscv: rvb: logic-with-negate support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,03/17] target/riscv: rvb: count bits set support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,02/17] target/riscv: rvb: count leading/trailing zeros support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v6,01/17] target/riscv: reformat @sh format encoding for B-extension support subsets of bitmanip extension - - 2 - --- 2021-05-05 Frank Chang New
[v5,17/17] target/riscv: rvb: add b-ext version cpu option support subsets of bitmanip extension - - - - --- 2021-04-21 Frank Chang New
[v5,16/17] target/riscv: rvb: support and turn on B-extension from command line support subsets of bitmanip extension - - 2 - --- 2021-04-21 Frank Chang New
[v5,15/17] target/riscv: rvb: add/shift with prefix zero-extend support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,14/17] target/riscv: rvb: address calculation support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,13/17] target/riscv: rvb: generalized or-combine support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,12/17] target/riscv: rvb: generalized reverse support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,11/17] target/riscv: rvb: rotate (left/right) support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,10/17] target/riscv: rvb: shift ones support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,09/17] target/riscv: rvb: single-bit instructions support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,08/17] target/riscv: add gen_shifti() and gen_shiftiw() helper functions support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,07/17] target/riscv: rvb: sign-extend instructions support subsets of bitmanip extension - - 2 - --- 2021-04-21 Frank Chang New
[v5,06/17] target/riscv: rvb: min/max instructions support subsets of bitmanip extension - - 2 - --- 2021-04-21 Frank Chang New
[v5,05/17] target/riscv: rvb: pack two words into one register support subsets of bitmanip extension - - 2 - --- 2021-04-21 Frank Chang New
[v5,04/17] target/riscv: rvb: logic-with-negate support subsets of bitmanip extension - - 2 - --- 2021-04-21 Frank Chang New
[v5,03/17] target/riscv: rvb: count bits set support subsets of bitmanip extension - - 2 - --- 2021-04-21 Frank Chang New
[v5,02/17] target/riscv: rvb: count leading/trailing zeros support subsets of bitmanip extension - - 1 - --- 2021-04-21 Frank Chang New
[v5,01/17] target/riscv: reformat @sh format encoding for B-extension support subsets of bitmanip extension - - 2 - --- 2021-04-21 Frank Chang New
[v2] fpu/softfloat: set invalid excp flag for RISC-V muladd instructions [v2] fpu/softfloat: set invalid excp flag for RISC-V muladd instructions - - 1 - --- 2021-04-20 Frank Chang New
target/riscv: fix vrgather macro index variable type bug target/riscv: fix vrgather macro index variable type bug - - 1 - --- 2021-04-19 Frank Chang New
target/riscv: fix vssub.vv saturation bug target/riscv: fix vssub.vv saturation bug - - - - --- 2021-04-19 Frank Chang New
fpu/softfloat: set invalid excp flag for RISC-V muladd instructions fpu/softfloat: set invalid excp flag for RISC-V muladd instructions - - - - --- 2021-04-19 Frank Chang New
[RFC,v2,4/4] target/riscv: add RNMI mnret instruction target/riscv: add RNMI support - - - - --- 2021-04-01 Frank Chang New
[RFC,v2,3/4] target/riscv: handle RNMI interrupt and exception target/riscv: add RNMI support - - - - --- 2021-04-01 Frank Chang New
[RFC,v2,2/4] target/riscv: add RNMI CSRs target/riscv: add RNMI support - - - - --- 2021-04-01 Frank Chang New
[RFC,v2,1/4] target/riscv: add RNMI cpu feature target/riscv: add RNMI support - - - - --- 2021-04-01 Frank Chang New
[RFC,1/1] target/riscv: add support of RNMI target/riscv: add RNMI support - - - - --- 2021-03-09 Frank Chang New
[v7,75/75] target/riscv: rvv-1.0: add vector unit-stride mask load/store insns support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,74/75] target/riscv: rvv-1.0: add evl parameter to vext_ldst_us() support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,73/75] target/riscv: rvv-1.0: add vsetivli instruction support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,72/75] target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11 support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,71/75] target/riscv: set mstatus.SD bit when writing fp CSRs support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,70/75] target/riscv: rvv-1.0: floating-point reciprocal estimate instruction support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,69/75] target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruction support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,68/75] target/riscv: gdb: support vector registers for rv64 & rv32 support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,67/75] target/riscv: rvv-1.0: set mstatus.SD bit when writing vector CSRs support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,66/75] target/riscv: rvv-1.0: trigger illegal instruction exception if frm is not valid support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,65/75] target/riscv: rvv-1.0: implement vstart CSR support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,64/75] target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,63/75] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,62/75] target/riscv: add "set round to odd" rounding mode helper function support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,61/75] target/riscv: rvv-1.0: widening floating-point/integer type-convert support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,60/75] target/riscv: rvv-1.0: floating-point/integer type-convert instructions support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,59/75] target/riscv: introduce floating-point rounding mode enum support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,58/75] target/riscv: rvv-1.0: floating-point min/max instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,57/75] target/riscv: rvv-1.0: remove integer extract instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,56/75] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,55/75] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,54/75] target/riscv: rvv-1.0: single-width scaling shift instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,53/75] target/riscv: rvv-1.0: widening floating-point reduction instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,52/75] target/riscv: rvv-1.0: single-width floating-point reduction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,51/75] target/riscv: rvv-1.0: narrowing fixed-point clip instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,50/75] target/riscv: rvv-1.0: floating-point slide instructions support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,49/75] target/riscv: rvv-1.0: slide instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,48/75] target/riscv: rvv-1.0: mask-register logical instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,47/75] target/riscv: rvv-1.0: floating-point compare instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,46/75] target/riscv: rvv-1.0: integer comparison instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,45/75] target/riscv: rvv-1.0: single-width saturating add and subtract instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,44/75] target/riscv: rvv-1.0: widening integer multiply-add instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,43/75] target/riscv: rvv-1.0: narrowing integer right shift instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,42/75] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,41/75] target/riscv: rvv-1.0: single-width bit shift instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,40/75] target/riscv: rvv-1.0: single-width averaging add and subtract instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,39/75] target/riscv: rvv-1.0: integer extension instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,38/75] target/riscv: rvv-1.0: whole register move instructions support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,37/75] target/riscv: rvv-1.0: floating-point scalar move instructions support vector extension v1.0 - - - - --- 2021-02-26 Frank Chang New
[v7,36/75] target/riscv: rvv-1.0: floating-point move instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,35/75] target/riscv: rvv-1.0: integer scalar move instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,34/75] target/riscv: rvv-1.0: register gather instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,33/75] target/riscv: rvv-1.0: allow load element with sign-extended support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,32/75] target/riscv: rvv-1.0: element index instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,31/75] target/riscv: rvv-1.0: iota instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,30/75] target/riscv: rvv-1.0: set-X-first mask bit instructions support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,29/75] target/riscv: rvv-1.0: find-first-set mask bit instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,28/75] target/riscv: rvv-1.0: mask population count instruction support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
[v7,27/75] target/riscv: rvv-1.0: floating-point classify instructions support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,26/75] target/riscv: rvv-1.0: floating-point square-root instruction support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,25/75] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation support vector extension v1.0 - - 2 - --- 2021-02-26 Frank Chang New
[v7,24/75] target/riscv: rvv-1.0: update vext_max_elems() for load/store insns support vector extension v1.0 - - 1 - --- 2021-02-26 Frank Chang New
« 1 2 ... 1252 1253 1254 … 4261 4262 »