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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[06/18] target/arm: declare new AA64PFR0 bit-fields
ARMv8.4-A Secure EL2
- - 1 -
-
-
-
2020-12-18
Rémi Denis-Courmont
New
[05/18] target/arm: factor MDCR_EL2 common handling
ARMv8.4-A Secure EL2
- - 1 -
-
-
-
2020-12-18
Rémi Denis-Courmont
New
[04/18] target/arm: use arm_hcr_el2_eff() where applicable
ARMv8.4-A Secure EL2
- - 1 -
-
-
-
2020-12-18
Rémi Denis-Courmont
New
[03/18] target/arm: use arm_is_el2_enabled() where applicable
ARMv8.4-A Secure EL2
- - 1 -
-
-
-
2020-12-18
Rémi Denis-Courmont
New
[02/18] target/arm: add arm_is_el2_enabled() helper
ARMv8.4-A Secure EL2
- - 1 -
-
-
-
2020-12-18
Rémi Denis-Courmont
New
[01/18] target/arm: remove redundant tests
ARMv8.4-A Secure EL2
- - 1 -
-
-
-
2020-12-18
Rémi Denis-Courmont
New
[6/6] spapr: Model DR connectors as simple objects
spapr: Fix visibility and traversal of DR connectors
- - 1 -
-
-
-
2020-12-18
Greg Kurz
New
[5/6] spapr: Add drc_ prefix to the DRC realize and unrealize functions
spapr: Fix visibility and traversal of DR connectors
- - 1 -
-
-
-
2020-12-18
Greg Kurz
New
[4/6] spapr: Use spapr_drc_reset_all() at machine reset
spapr: Fix visibility and traversal of DR connectors
- - 1 -
-
-
-
2020-12-18
Greg Kurz
New
[3/6] spapr: Introduce spapr_drc_reset_all()
spapr: Fix visibility and traversal of DR connectors
- - 1 -
-
-
-
2020-12-18
Greg Kurz
New
[2/6] spapr: Fix reset of transient DR connectors
spapr: Fix visibility and traversal of DR connectors
- - 1 -
-
-
-
2020-12-18
Greg Kurz
New
[1/6] spapr: Call spapr_drc_reset() for all DRCs at CAS
spapr: Fix visibility and traversal of DR connectors
- - 1 -
-
-
-
2020-12-18
Greg Kurz
New
[PULL,14/14] linux-user/sparc: Handle tstate in sparc64_get/set_context()
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,13/14] linux-user/sparc: Don't restore %g7 in sparc64_set_context()
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,12/14] linux-user/sparc: Remove unneeded checks of 'err' from sparc64_get_context()
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,11/14] linux-user/sparc: Correct sparc64_get/set_context() FPU handling
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,10/14] linux-user: Add most IFTUN ioctls
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,09/14] linux-user: Implement copy_file_range
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,08/14] docs/user: Display linux-user binaries nicely
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,07/14] linux-user: Add support for MIPS Loongson 2F/3A
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,06/14] linux-user/elfload: Update HWCAP bits from linux 5.7
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,05/14] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_EQU() macro
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,04/14] linux-user/elfload: Introduce MIPS GET_FEATURE_REG_SET() macro
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,03/14] linux-user/elfload: Rename MIPS GET_FEATURE() as GET_FEATURE_INSN()
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,02/14] linux-user/elfload: Move GET_FEATURE macro out of get_elf_hwcap() body
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - 1 -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
[PULL,01/14] linux-user/mmap.c: check range of mremap result in target address space
- - - -
-
-
-
2020-12-18
Laurent Vivier
New
[PULL,00/14] Linux user for 6.0 patches
- - - -
-
-
-
2020-12-18
Laurent Vivier
New
[3/3] hw/block/nvme: lift cmb restrictions
hw/block/nvme: cmb enhancements and bump to v1.4
- - - -
-
-
-
2020-12-18
Klaus Jensen
New
[2/3] hw/block/nvme: bump to v1.4
hw/block/nvme: cmb enhancements and bump to v1.4
- - - -
-
-
-
2020-12-18
Klaus Jensen
New
[1/3] hw/block/nvme: cmb enhancements
hw/block/nvme: cmb enhancements and bump to v1.4
- - - -
-
-
-
2020-12-18
Klaus Jensen
New
whpx: fix compilation
whpx: fix compilation
- - - -
-
-
-
2020-12-18
Marc-André Lureau
New
[PULL,14/14] configure: Compile with -Wimplicit-fallthrough=2
Untitled series #221209
- - 2 -
-
-
-
2020-12-18
Thomas Huth
New
[PULL,13/14] hw/rtc/twl92230: Add missing 'break'
Untitled series #221209
- - 2 -
-
-
-
2020-12-18
Thomas Huth
New
[PULL,12/14] bsd-user: Silence warnings about missing fallthrough statement
Untitled series #221209
- - 1 -
-
-
-
2020-12-18
Thomas Huth
New
[PULL,v2,00/14] Compile QEMU with -Wimplicit-fallthrough
- - - -
-
-
-
2020-12-18
Thomas Huth
New
[PULL,23/23] riscv/opentitan: Update the OpenTitan memory layout
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
- - - -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,22/23] hw/riscv: Use the CPU to determine if 32-bit
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
- - 1 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,21/23] target/riscv: cpu: Set XLEN independently from target
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,20/23] target/riscv: csr: Remove compile time XLEN checks
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,19/23] target/riscv: cpu_helper: Remove compile time XLEN checks
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 3 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,18/23] target/riscv: cpu: Remove compile time XLEN checks
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 3 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,17/23] target/riscv: Specify the XLEN for CPUs
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 3 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,16/23] target/riscv: Add a riscv_cpu_is_32bit() helper function
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,15/23] target/riscv: fpu_helper: Match function defs in HELPER macros
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
- - - -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,14/23] hw/riscv: sifive_u: Remove compile time XLEN checks
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,13/23] hw/riscv: spike: Remove compile time XLEN checks
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,12/23] hw/riscv: virt: Remove compile time XLEN checks
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,11/23] hw/riscv: boot: Remove compile time XLEN checks
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,10/23] riscv: virt: Remove target macro conditionals
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,09/23] riscv: spike: Remove target macro conditionals
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,08/23] target/riscv: Add a TYPE_RISCV_CPU_BASE CPU
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 2 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,07/23] hw/riscv: Expand the is 32-bit check to support more CPUs
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 1 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,06/23] intc/ibex_plic: Clear interrupts that occur during claim process
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
- - - 1
-
-
-
2020-12-18
Alistair Francis
New
[PULL,05/23] target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
- - 1 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,04/23] target/riscv: Fix the bug of HLVX/HLV/HSV
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
- - 1 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,03/23] hw/core/register.c: Don't use '#' flag of printf format
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
- - 1 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,02/23] hw/riscv: microchip_pfsoc: add QSPI NOR flash
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
1 - 1 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
[PULL,01/23] hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
- - 1 -
-
-
-
2020-12-18
Alistair Francis
New
[PULL,00/23] riscv-to-apply queue
- - - -
-
-
-
2020-12-18
Alistair Francis
New
[v14,RESEND,21/21] multi-process: perform device reset in the remote process
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,20/21] multi-process: Retrieve PCI info from remote process
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,19/21] multi-process: create IOHUB object to handle irq
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,18/21] multi-process: Synchronize remote memory
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,17/21] multi-process: PCI BAR read/write handling for proxy & remote endpoints
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,16/21] multi-process: Forward PCI config space acceses to the remote process
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,15/21] multi-process: add proxy communication functions
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,14/21] multi-process: introduce proxy object
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,13/21] multi-process: setup memory manager for remote device
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,12/21] multi-process: Associate fd of a PCIDevice with its object
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,11/21] multi-process: Initialize message handler in remote device
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,10/21] multi-process: define MPQemuMsg format and transmission functions
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,09/21] multi-process: add qio channel read function
Initial support for multi-process Qemu
- - - -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,08/21] multi-process: add qio channel write function
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,07/21] multi-process: setup a machine object for remote device process
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,06/21] multi-process: setup PCI host bridge for remote device
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,RESEND,05/21] multi-process: Add config option for multi-process QEMU
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,04/21] socket: export socket_get_fd() function
Initial support for multi-process Qemu
- - - -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,03/21] memory: alloc RAM from file at offset
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,02/21] multi-process: add configure and usage information
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[v14,01/21] multi-process: add the concept description to docs/devel/qemu-multiprocess
Initial support for multi-process Qemu
- - 1 -
-
-
-
2020-12-18
Elena Ufimtseva
New
[qemu,v12] spapr: Implement Open Firmware client interface
[qemu,v12] spapr: Implement Open Firmware client interface
1 - - 1
-
-
-
2020-12-18
Alexey Kardashevskiy
New
[v2,1/1] target-riscv: support QMP dump-guest-memory
target-riscv: support QMP dump-guest-memory
- - 2 -
-
-
-
2020-12-18
Yifei Jiang
New
tests/docker: Use lower case for centos8 powertools
tests/docker: Use lower case for centos8 powertools
- - 1 -
-
-
-
2020-12-18
Jiaxun Yang
New
[v2,2/2] s390x/pci: Fix memory_region_access_valid call
s390x/pci: some pcistb fixes
1 1 1 -
-
-
-
2020-12-17
Matthew Rosato
New
[v2,1/2] s390x/pci: fix pcistb length
s390x/pci: some pcistb fixes
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2020-12-17
Matthew Rosato
New
RISC-V: Place DTB at 3GB boundary instead of 4GB
RISC-V: Place DTB at 3GB boundary instead of 4GB
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2020-12-17
Atish Patra
New
[RFC,3/3] hw/block/nvme: end-to-end data protection
hw/block/nvme: dif-based end-to-end data protection support
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2020-12-17
Klaus Jensen
New
[RFC,2/3] hw/block/nvme: refactor nvme_dma
hw/block/nvme: dif-based end-to-end data protection support
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2020-12-17
Klaus Jensen
New
[RFC,1/3] nvme: add support for extended LBAs
hw/block/nvme: dif-based end-to-end data protection support
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2020-12-17
Klaus Jensen
New
[PULL,17/17] cpu: Remove unnecessary noop methods
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
[PULL,16/17] tcg: Make CPUClass.debug_excp_handler optional
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
[PULL,15/17] tcg: make CPUClass.cpu_exec_* optional
[PULL,01/17] i386: move kvm accel files into kvm/
- - 1 -
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2020-12-17
Eduardo Habkost
New
[PULL,14/17] tcg: cpu_exec_{enter,exit} helpers
[PULL,01/17] i386: move kvm accel files into kvm/
- - 2 -
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2020-12-17
Eduardo Habkost
New
[PULL,13/17] i386: tcg: remove inline from cpu_load_eflags
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
[PULL,12/17] i386: move TCG cpu class initialization to tcg/
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
[PULL,11/17] x86/cpu: Add AVX512_FP16 cpu feature
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
[PULL,10/17] i386: move hyperv_limits initialization to x86_cpu_realizefn()
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
[PULL,09/17] i386: move hyperv_version_id initialization to x86_cpu_realizefn()
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
[PULL,08/17] i386: move hyperv_interface_id initialization to x86_cpu_realizefn()
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
[PULL,07/17] i386: move hyperv_vendor_id initialization to x86_cpu_realizefn()
[PULL,01/17] i386: move kvm accel files into kvm/
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2020-12-17
Eduardo Habkost
New
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