Show patches with: State = Action Required       |    Archived = No       |   426764 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2,02/10] target-arm: A64: Add SIMD ld/st single - - 1 - --- 2014-01-13 Peter Maydell New
[v2,03/10] target-arm: A64: Add decode skeleton for SIMD data processing insns - - 2 - --- 2014-01-13 Peter Maydell New
[v2,04/10] target-arm: A64: Add SIMD EXT - - 1 - --- 2014-01-13 Peter Maydell New
[v2,05/10] target-arm: A64: Add SIMD TBL/TBLX - - 1 - --- 2014-01-13 Peter Maydell New
[v2,06/10] target-arm: A64: Add SIMD ZIP/UZP/TRN - - 1 - --- 2014-01-13 Peter Maydell New
[v2,07/10] target-arm: A64: Add SIMD across-lanes instructions - - 1 - --- 2014-01-13 Peter Maydell New
[v2,08/10] target-arm: A64: Add SIMD copy operations - - 1 - --- 2014-01-13 Peter Maydell New
[v2,09/10] target-arm: A64: Add SIMD modified immediate group - - 1 - --- 2014-01-13 Peter Maydell New
[v2,10/10] target-arm: A64: Add SIMD scalar copy instructions - - 1 - --- 2014-01-13 Peter Maydell New
block/curl: Implement the libcurl timer callback interface - - - - --- 2014-01-15 Peter Maydell New
[v2,1/5] rules.mak: Support .cc as a C++ source file suffix - - - - --- 2014-01-16 Peter Maydell New
[v2,2/5] rules.mak: Link with C++ if we have a C++ compiler - - - - --- 2014-01-16 Peter Maydell New
[v2,3/5] disas: Add subset of libvixl sources for A64 disassembler - - - - --- 2014-01-16 Peter Maydell New
[v2,4/5] disas/libvixl: Fix upstream libvixl compilation issues - - - - --- 2014-01-16 Peter Maydell New
[v2,5/5] disas: Implement disassembly output for A64 - - - - --- 2014-01-16 Peter Maydell New
[1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns - - - - --- 2014-01-17 Peter Maydell New
[2/8] target-arm: A64: Add SIMD three-different ABDL instructions - - - - --- 2014-01-17 Peter Maydell New
[3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops - - - - --- 2014-01-17 Peter Maydell New
[4/8] target-arm: A64: Add top level decode for SIMD 3-same group - - - - --- 2014-01-17 Peter Maydell New
[5/8] target-arm: A64: Add logic ops from SIMD 3 same group - - - - --- 2014-01-17 Peter Maydell New
[6/8] target-arm: A64: Add integer ops from SIMD 3-same group - - - - --- 2014-01-17 Peter Maydell New
[7/8] target-arm: A64: Add simple SIMD 3-same floating point ops - - - - --- 2014-01-17 Peter Maydell New
[8/8] target-arm: A64: Add SIMD shift by immediate - - - - --- 2014-01-17 Peter Maydell New
target-arm: Log bad system register accesses with LOG_UNIMP - - - - --- 2014-01-20 Peter Maydell New
[01/24] target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUs - - - - --- 2014-01-21 Peter Maydell New
[02/24] target-arm: Define names for SCTLR bits - - - - --- 2014-01-21 Peter Maydell New
[03/24] target-arm: Restrict check_ap() use of S and R bits to v6 and earlier - - 1 - --- 2014-01-21 Peter Maydell New
[04/24] target-arm: Log bad system register accesses with LOG_UNIMP - - 1 - --- 2014-01-21 Peter Maydell New
[05/24] target-arm: Add exception level to the AArch64 TB flags - - - - --- 2014-01-21 Peter Maydell New
[06/24] target-arm: A64: Implement store-exclusive for system mode - - - - --- 2014-01-21 Peter Maydell New
[07/24] target-arm: A64: Make cache ID registers visible to AArch64 - - - - --- 2014-01-21 Peter Maydell New
[08/24] target-arm: A64: Implement MSR (immediate) instructions - - - - --- 2014-01-21 Peter Maydell New
[09/24] target-arm: Implement AArch64 CurrentEL sysreg - - - - --- 2014-01-21 Peter Maydell New
[10/24] target-arm: Implement AArch64 MIDR_EL1 - - 1 - --- 2014-01-21 Peter Maydell New
[11/24] target-arm: Implement AArch64 DAIF system register - - 1 - --- 2014-01-21 Peter Maydell New
[12/24] target-arm: Implement AArch64 cache invalidate/clean ops - - - - --- 2014-01-21 Peter Maydell New
[13/24] target-arm: Implement AArch64 TLB invalidate ops - - - - --- 2014-01-21 Peter Maydell New
[14/24] target-arm: Implement AArch64 dummy MDSCR_EL1 - - - - --- 2014-01-21 Peter Maydell New
[15/24] target-arm: Implement AArch64 memory attribute registers - - - - --- 2014-01-21 Peter Maydell New
[16/24] target-arm: Implement AArch64 SCTLR_EL1 - - - - --- 2014-01-21 Peter Maydell New
[17/24] target-arm: Implement AArch64 TCR_EL1 - - - - --- 2014-01-21 Peter Maydell New
[18/24] target-arm: Implement AArch64 VBAR_EL1 - - 1 - --- 2014-01-21 Peter Maydell New
[19/24] target-arm: Implement AArch64 TTBR* - - 1 - --- 2014-01-21 Peter Maydell New
[20/24] target-arm: Implement AArch64 MPIDR - - 1 - --- 2014-01-21 Peter Maydell New
[21/24] target-arm: Implement AArch64 generic timers - - - - --- 2014-01-21 Peter Maydell New
[22/24] target-arm: Implement AArch64 ID and feature registers - - - - --- 2014-01-21 Peter Maydell New
[23/24] target-arm: Implement AArch64 dummy breakpoint and watchpoint registers - - - - --- 2014-01-21 Peter Maydell New
[24/24] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI - - - - --- 2014-01-21 Peter Maydell New
[v2,00/42] rework input handling, sdl2 support - - - - --- 2014-01-22 Peter Maydell New
[v2,1/8] target-arm: A64: Add SIMD three-different multiply accumulate insns - - 1 - --- 2014-01-23 Peter Maydell New
[v2,2/8] target-arm: A64: Add SIMD three-different ABDL instructions - - 1 - --- 2014-01-23 Peter Maydell New
[v2,3/8] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops - - 1 - --- 2014-01-23 Peter Maydell New
[v2,4/8] target-arm: A64: Add top level decode for SIMD 3-same group - - 1 - --- 2014-01-23 Peter Maydell New
[v2,5/8] target-arm: A64: Add logic ops from SIMD 3 same group - - 1 - --- 2014-01-23 Peter Maydell New
[v2,6/8] target-arm: A64: Add integer ops from SIMD 3-same group - - 1 - --- 2014-01-23 Peter Maydell New
[v2,7/8] target-arm: A64: Add simple SIMD 3-same floating point ops - - 1 - --- 2014-01-23 Peter Maydell New
[v2,8/8] target-arm: A64: Add SIMD shift by immediate - - 1 - --- 2014-01-23 Peter Maydell New
tests/Makefile: Run qom-test for every architecture - - 1 - --- 2014-01-23 Peter Maydell New
[v2,7/8] target-arm: A64: Add simple SIMD 3-same floating point ops - - - - --- 2014-01-23 Peter Maydell New
[01/21] target-arm: A64: Add SIMD three-different multiply accumulate insns - - 1 - --- 2014-01-26 Peter Maydell New
[02/21] target-arm: A64: Add SIMD three-different ABDL instructions - - 1 - --- 2014-01-26 Peter Maydell New
[03/21] target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops - - 1 - --- 2014-01-26 Peter Maydell New
[04/21] target-arm: A64: Add top level decode for SIMD 3-same group - - 1 - --- 2014-01-26 Peter Maydell New
[05/21] target-arm: A64: Add logic ops from SIMD 3 same group - - 1 - --- 2014-01-26 Peter Maydell New
[06/21] target-arm: A64: Add integer ops from SIMD 3-same group - - 1 - --- 2014-01-26 Peter Maydell New
[07/21] target-arm: A64: Add simple SIMD 3-same floating point ops - - 1 - --- 2014-01-26 Peter Maydell New
[08/21] target-arm: A64: Add SIMD shift by immediate - - 1 - --- 2014-01-26 Peter Maydell New
[09/21] target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns - - 1 - --- 2014-01-26 Peter Maydell New
[10/21] target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns - - 1 - --- 2014-01-26 Peter Maydell New
[11/21] target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD - - 1 - --- 2014-01-26 Peter Maydell New
[12/21] tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTR - - 1 - --- 2014-01-26 Peter Maydell New
[13/21] target-arm: A64: Implement scalar pairwise ops - - 1 - --- 2014-01-26 Peter Maydell New
[14/21] target-arm: A64: Implement remaining integer scalar-3-same insns - - 1 - --- 2014-01-26 Peter Maydell New
[15/21] target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc - - 1 - --- 2014-01-26 Peter Maydell New
[16/21] target-arm: A64: Add skeleton decode for SIMD 2-reg misc group - - 1 - --- 2014-01-26 Peter Maydell New
[17/21] target-arm: A64: Implement 2-register misc compares, ABS, NEG - - 1 - --- 2014-01-26 Peter Maydell New
[18/21] target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT - - 1 - --- 2014-01-26 Peter Maydell New
[19/21] target-arm: A64: Add narrowing 2-reg-misc instructions - - 1 - --- 2014-01-26 Peter Maydell New
[20/21] target-arm: A64: Add 2-reg-misc REV* instructions - - 1 - --- 2014-01-26 Peter Maydell New
[21/21] target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group - - 1 - --- 2014-01-26 Peter Maydell New
[PULL,00/38] target-arm queue - - - - --- 2014-01-29 Peter Maydell New
[PULL,01/38] target-arm: A64: Add SIMD ld/st multiple - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,02/38] target-arm: A64: Add SIMD ld/st single - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,03/38] target-arm: A64: Add decode skeleton for SIMD data processing insns - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,04/38] target-arm: A64: Add SIMD EXT - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,05/38] target-arm: A64: Add SIMD TBL/TBLX - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,06/38] target-arm: A64: Add SIMD ZIP/UZP/TRN - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,07/38] target-arm: A64: Add SIMD across-lanes instructions - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,08/38] target-arm: A64: Add SIMD copy operations - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,09/38] target-arm: A64: Add SIMD modified immediate group - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,10/38] target-arm: A64: Add SIMD scalar copy instructions - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,11/38] hw/arm/boot: Don't set up ATAGS for autogenerated dtb booting - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,12/38] ARM: Convert MIDR to a property - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,13/38] ZYNQ: Implement board MIDR control for Zynq - - - - --- 2014-01-29 Peter Maydell New
[PULL,14/38] display: avoid multi-statement macro - - - - --- 2014-01-29 Peter Maydell New
[PULL,15/38] target-arm: Move arm_rmode_to_sf to a shared location. - - 1 - --- 2014-01-29 Peter Maydell New
[PULL,16/38] target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM - - - - --- 2014-01-29 Peter Maydell New
[PULL,17/38] target-arm: Add support for AArch32 FP VRINTR - - - - --- 2014-01-29 Peter Maydell New
[PULL,18/38] target-arm: Add support for AArch32 FP VRINTZ - - - - --- 2014-01-29 Peter Maydell New
[PULL,19/38] target-arm: Add support for AArch32 FP VRINTX - - - - --- 2014-01-29 Peter Maydell New
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