Show patches with: State = Action Required       |    Archived = No       |   202211 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2] target-s390x: Implement stfl and stfle - - - - 0 0 0 2017-02-25 Michal Marek New
[v2] target-s390x: Implement lpp instruction - - 1 - 0 0 0 2017-02-27 Miroslav Benes New
[v2] target-ppc: reset SPRs on CPU reset - - - - 0 0 0 2014-03-19 Alexey Kardashevskiy New
[v2] target-ppc: ppc can be either endian - - - - 0 0 0 2014-04-29 Greg Kurz New
[v2] target-ppc: move POWER7+ to a separate family - - - - 0 0 0 2013-11-08 Alexey Kardashevskiy New
[v2] target-ppc: kvm: Fix memory overflow issue about strncat() - - - - 0 0 0 2014-10-15 Chen Gang New
[v2] target-ppc: improve "info registers" by printing SPRs - - - - 0 0 0 2014-03-22 Alexey Kardashevskiy New
[v2] target-ppc: gdbstub allow byte swapping for reading/writing registers - - - - 0 0 0 2014-01-16 Thomas Falcon New
[v2] target-ppc: fix nego and subf*o instructions - - 1 - 0 0 0 2013-04-01 Aurelien Jarno New
[v2] target-ppc: add extended opcodes for dcbt/dcbtst - - - - 0 0 0 2014-02-20 Cédric Le Goater New
[v2] target-ppc: add PPC_MFTB flag to e500mc and e5500 - - - - 0 0 0 2016-07-22 Michael Walle New
[v2] target-ppc: Handle memory-forced I/O controller access - - - - 0 0 0 2011-06-14 Andreas Färber New
[v2] target-ppc: Fix rlwimi, rlwinm, rlwnm - - - 1 0 0 0 2016-06-18 Richard Henderson New
[v2] target-ppc: Fix narrow-mode add/sub carry output - - 1 1 0 0 0 2013-04-03 Richard Henderson New
[v2] target-ppc: Enable open-pic timers to count and generate interrupts - - - - 0 0 0 2017-05-03 alarson@ddci.com New
[v2] target-ppc: Eliminate redundant and incorrect function booke206_page_size_to_tlb - - - - 0 0 0 2016-06-28 alarson@ddci.com New
[v2] target-ppc: Add pvr_match() callback - - - - 0 0 0 2014-07-03 Alexey Kardashevskiy New
[v2] target-ppc: Add MMU model check for booke machines - - - - 0 0 0 2017-01-25 Valentin Plotkin New
[v2] target-openrisc: bugfix for dec_sys to decode instructions correctly 1 - - - 0 0 0 2015-01-06 David Morrison New
[v2] target-mips: simplify LWL/LDL mask generation - - 1 - 0 0 0 2015-07-15 Aurelien Jarno New
[v2] target-mips: remove wrong checks for recip.fmt and rsqrt.fmt - - - - 0 0 0 2015-08-26 Petar Jovanovic New
[v2] target-mips: implement UserLocal Register - - - - 0 0 0 2014-05-26 Petar Jovanovic New
[v2] target-mips: implement R6 multi-threading - - - - 0 0 0 2016-02-03 Leon Alrae New
[v2] target-mips: generate fences - - 1 - 0 0 0 2016-09-08 Leon Alrae New
[v2] target-mips: gdbstub: Clean up FPU register handling - - - - 0 0 0 2014-12-05 Maciej W. Rozycki New
[v2] target-mips: fix updating XContext on mmu exception - - - - 0 0 0 2015-10-29 Yongbok Kim New
[v2] target-mips: fix mipsdsp_trunc16_sat16_round - - 1 - 0 0 0 2013-06-30 Petar Jovanovic New
[v2] target-mips: fix decoding of microMIPS POOL32Axf instructions - - - - 0 0 0 2013-08-05 Leon Alrae New
[v2] target-mips: fix broken MIPS16 and microMIPS - - - 1 0 0 0 2014-07-01 Yongbok Kim New
[v2] target-mips: fix broken MIPS16 and microMIPS - - 1 - 0 0 0 2014-08-01 Yongbok Kim New
[v2] target-mips: fix EXTPDP and setting up pos field in the DSPControl reg - - - - 0 0 0 2013-05-17 Petar Jovanovic New
[v2] target-mips: fix CP0.BadVAddr by stopping translation on Address Error - - - - 0 0 0 2015-03-16 Leon Alrae New
[v2] target-mips: fix 34Kf configuration for DSP ASE - - - - 0 0 0 2013-08-02 Yongbok Kim New
[v2] target-mips: clean-up in BIT_INSV - - - - 0 0 0 2013-05-13 Petar Jovanovic New
[v2] target-mips: add SIGRIE instruction - - - - 0 0 0 2015-10-29 Yongbok Kim New
[v2] target-mips: add PC, XNP reg numbers to RDHWR - - - - 0 0 0 2015-10-29 Yongbok Kim New
[v2] target-mips: Use new qemu_ld/st opcodes - - 1 - 0 0 0 2013-12-12 Aurelien Jarno New
[v2] target-mips: Use TCG registers for the FPU. - - 1 - 0 0 0 2012-09-19 Richard Henderson New
[v2] target-mips: Tighten ISA level checks - - - - 0 0 0 2014-12-03 Maciej W. Rozycki New
[v2] target-mips: Implement Loongson Multimedia Instructions - - - - 0 0 0 2012-03-30 Richard Henderson New
[v2] target-mips: Implement Loongson 3A processor. - - - - 0 0 0 2016-12-01 Heiher New
[v2] target-mips: Fix incorrect shift for SHILO and SHILOV - - 2 - 0 0 0 2012-12-04 Petar Jovanovic New
[v2] target-mips: Fix exceptions while UX=0 - - - - 0 0 0 2015-11-17 James Hogan New
[v2] target-mips: Fix accumulator selection for MIPS16 and microMIPS - - - - 0 0 0 2013-01-21 Richard Sandiford New
[v2] target-mips: Fix RDHWR on CP0.Count - - 2 - 0 0 0 2015-09-08 Alex Smith New
[v2] target-mips: Fix Loongson pandn instruction. - - 1 - 0 0 0 2016-10-14 Heiher New
[v2] target-mips: Fix ALIGN instruction when bp=0 - - 1 - 0 0 0 2016-01-04 Miodrag Dinic New
[v2] target-mips: Clean up microMIPS32 major opcode - - - - 0 0 0 2012-11-16 陳韋任 New
[v2] target-mips: Add initrd support for the Boston board [v2] target-mips: Add initrd support for the Boston board - - 1 - 0 0 0 2018-03-19 Aleksandar Rikalo New
[v2] target-mips: Add comments on POOL32Axf encoding - - 1 - 0 0 0 2012-11-21 陳韋任 New
[v2] target-m68k: add rol/ror/roxl/roxr instructions - - - - 0 0 0 2016-11-10 Laurent Vivier New
[v2] target-m68k, linux-user: manage FP registers in ucontext - - 1 - 0 0 0 2017-06-21 Laurent Vivier New
[v2] target-lm32: move model features to LM32CPU - - - - 0 0 0 2013-10-14 Michael Walle New
[v2] target-i386: use static properties to list CPUID features - - - - 0 0 0 2012-10-23 Igor Mammedov New
[v2] target-i386: use static properties in check_features_against_host() to print CPUID feature n... - - - - 0 0 0 2012-10-23 Igor Mammedov New
[v2] target-i386: update fp status fix - - 2 - 0 0 0 2014-09-17 Pavel Dovgalyuk New
[v2] target-i386: present virtual L3 cache info for vcpus - - - - 0 0 0 2016-09-01 Longpeng (Mike) New
[v2] target-i386: move generic memory hotplug methods to DSDTs - - 1 - 0 0 0 2014-10-15 Paolo Bonzini New
[v2] target-i386: initialize APIC at CPU level - - - - 0 0 0 2012-10-08 Igor Mammedov New
[v2] target-i386: implement PKE for TCG - - - - 0 0 0 2016-03-11 Paolo Bonzini New
[v2] target-i386: implement CPUID[0xB] (Extended Topology Enumeration) - - - - 0 0 0 2016-05-12 Radim Krčmář New
[v2] target-i386: fix losing XCR0 processor state component bits - - - - 0 0 0 2016-09-28 Wanpeng Li New
[v2] target-i386: emulate CPUID level of real hardware - - - - 0 0 0 2015-06-19 Radim Krčmář New
[v2] target-i386: Use struct X86XSaveArea in fpu_helper.c - - - - 0 0 0 2016-07-06 Richard Henderson New
[v2] target-i386: Report on error during cpu_x86_register(). - - - - 0 0 0 2012-09-03 Don Slutz New
[v2] target-i386: Report on error during cpu_x86_register(). - - - - 0 0 0 2012-09-17 Don Slutz New
[v2] target-i386: Print warning when mixing [+-]foo and foo=(on|off) - - 1 - 0 0 0 2016-10-21 Eduardo Habkost New
[v2] target-i386: Print warning when mixing [+-]foo and foo=(on|off) - - 1 - 0 0 0 2016-10-24 Eduardo Habkost New
[v2] target-i386: Mask NX bit from cpu_get_phys_page_debug result - - 1 - 0 0 0 2012-03-06 Jan Kiszka New
[v2] target-i386: Intel xsaves - - - - 0 0 0 2001-01-02 Wanpeng Li New
[v2] target-i386: Improve x86_cpu_list output - - 1 - 0 0 0 2013-02-27 Jan Kiszka New
[v2] target-i386: Fix segment cache dump - - 1 - 0 0 0 2013-08-23 Tobias Markus New
[v2] target-i386: Dump unknown opcodes with -d unimp - - - - 0 0 0 2016-03-05 Richard Henderson New
[v2] target-i386: Disable cache info passthrough by default - - 1 - 0 0 0 2015-09-02 Eduardo Habkost New
[v2] target-i386/kvm: Hyper-V VMBus hypercalls blank handlers - - 1 - 0 0 0 2016-01-21 Andrey Smetanin New
[v2] target-i386/cpu: Add new EPYC CPU model - - - - 0 0 0 2017-08-14 Brijesh Singh New
[v2] target-cris: update CPU state save/load to use VMStateDescription 1 - - - 0 0 0 2015-08-07 Peter Maydell New
[v2] target-cris: Use movcond and setcond - - 1 1 0 0 0 2015-09-02 Richard Henderson New
[v2] target-arm: use extended address bits from supersection short descriptor - - - - 0 0 0 2015-06-02 Sergey Fedorov New
[v2] target-arm: raise exception on misaligned LDREX operands - - - - 0 0 0 2015-12-03 Andrew Baumann New
[v2] target-arm: raise exception on misaligned LDREX operands - - - - 0 0 0 2015-12-15 Peter Maydell New
[v2] target-arm: kvm: Differentiate registers based on write-back levels - - - - 0 0 0 2015-07-16 Christoffer Dall New
[v2] target-arm: implement vsli.64, vsri.64 - - 1 - 0 0 0 2011-02-08 Christophe Lyon New
[v2] target-arm: implement PD0/PD1 bits for TTBCR - - - - 0 0 0 2014-06-05 Fabian Aggeler New
[v2] target-arm: implement PD0/PD1 bits for TTBCR - - - - 0 0 0 2014-06-10 Fabian Aggeler New
[v2] target-arm: implement LDA/STL instructions - - - - 0 0 0 2013-06-17 Måns Rullgård New
[v2] target-arm: implement CPACR register logic for ARMv7 - - 1 - 0 0 0 2014-05-19 Fabian Aggeler New
[v2] target-arm: fix build with gcc 4.8.2 - - - - 0 0 0 2013-12-23 Michael S. Tsirkin New
[v2] target-arm: fix VSHLL Neon instruction. - - 1 - 0 0 0 2011-02-09 Christophe Lyon New
[v2] target-arm: fix UMAAL instruction - - 1 - 0 0 0 2010-12-31 Aurelien Jarno New
[v2] target-arm: cleanup internal resource leaks - - - - 0 0 0 2009-10-22 Juha.Riihimaki@nokia.com New
[v2] target-arm: check that LSB <= MSB in BFI instruction - - - - 0 0 0 2015-01-30 Kirill Batuzov New
[v2] target-arm: add support for v8 AES instructions - - 1 - 0 0 0 2013-12-05 Ard Biesheuvel New
[v2] target-arm: add feature flag for ARMv8 - - 1 - 0 0 0 2013-06-13 Måns Rullgård New
[v2] target-arm: add Faraday ARMv5TE processors support - - - - 0 0 0 2013-01-25 Kuo-Jung Su New
[v2] target-arm: Use the right MMU index in arm_regime_using_lpae_format - - - - 0 0 0 2016-01-15 Alvise Rigo New
[v2] target-arm: Use new qemu_ld/st opcodes - - 1 - 0 0 0 2013-12-09 Richard Henderson New
[v2] target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc) - - 1 - 0 0 0 2015-03-17 Peter Maydell New
[v2] target-arm: Set carry flag correctly for Thumb2 ORNS - - - - 0 0 0 2011-03-06 Peter Maydell New
[v2] target-arm: Reinsert SRS missing return statement. - - 1 - 0 0 0 2013-04-15 Peter Chubb New
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