Show patches with: State = Action Required       |   428087 patches
« 1 2 3 4 … 4280 4281 »
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[PULL,19/46] ppc: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,18/46] openrisc: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,17/46] mips: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,16/46] meson: make target endianneess available to Kconfig [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,15/46] microblaze: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,14/46] m68k: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,13/46] loongarch: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,12/46] i386: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,11/46] hppa: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,10/46] cris: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,09/46] avr: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,08/46] arm: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,07/46] alpha: switch boards to "default y" [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,06/46] configs: list "implied" device groups in the default configs [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,05/46] kvm: ppc: disable sPAPR code if CONFIG_PSERIES is disabled [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,04/46] gitlab-ci: adjust msys2-64bit to be able to run qtest [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - - --- 2024-05-06 Paolo Bonzini New
[PULL,03/46] tests/qtest: skip m48t59-test if the machine is absent [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - 1 - --- 2024-05-06 Paolo Bonzini New
[PULL,02/46] Kconfig: kvm: allow building without any board [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - - 1 --- 2024-05-06 Paolo Bonzini New
[PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK [PULL,01/46] target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK - - 1 - --- 2024-05-06 Paolo Bonzini New
[PULL,00/46] Mostly build system and other cleanups patches for 2024-05-06 - - - - --- 2024-05-06 Paolo Bonzini New
Fixes: Indentation using TABs and improve formatting Fixes: Indentation using TABs and improve formatting - - - - --- 2024-05-06 Tanmay New
[v3,5/5] tests: Add migration test for loongarch64 Add migration test for loongarch64 2 - 1 - --- 2024-05-06 maobibo New
[v3,4/5] hw/loongarch: Set minimium memory size as 256M Add migration test for loongarch64 - - - - --- 2024-05-06 maobibo New
[v3,3/5] hw/loongarch: Add compat machine for 9.0 Add migration test for loongarch64 - - - - --- 2024-05-06 maobibo New
[v3,2/5] hw/loongarch: Rename LoongArchMachineState with VirtMachineState Add migration test for loongarch64 - - - - --- 2024-05-06 maobibo New
[v3,1/5] hw/loongarch: Rename LOONGARCH_MACHINE with VIRT_MACHINE Add migration test for loongarch64 - - - - --- 2024-05-06 maobibo New
[PULL,15/15] Hexagon (target/hexagon) Remove hex_common.read_attribs_file [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 2 - --- 2024-05-06 Brian Cain New
[PULL,14/15] Hexagon (target/hexagon) Remove gen_shortcode.py [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 2 - --- 2024-05-06 Brian Cain New
[PULL,13/15] Hexagon (target/hexagon) Remove gen_op_regs.py [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,12/15] Hexagon (target/hexagon) Remove uses of op_regs_generated.h.inc [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,11/15] Hexagon (tests/tcg/hexagon) Test HVX .new read from high half of pair [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,10/15] Hexagon (target/hexagon) Mark has_pred_dest in trans functions [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,09/15] Hexagon (target/hexagon) Mark dest_idx in trans functions [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,08/15] Hexagon (target/hexagon) Mark new_read_idx in trans functions [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,07/15] Hexagon (target/hexagon) Add is_old/is_new to Register class [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 2 - --- 2024-05-06 Brian Cain New
[PULL,06/15] Hexagon (target/hexagon) Only pass env to generated helper when needed [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 1 --- 2024-05-06 Brian Cain New
[PULL,05/15] Hexagon (target/hexagon) Pass SP explicitly to helpers that need it [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 2 1 --- 2024-05-06 Brian Cain New
[PULL,04/15] Hexagon (target/hexagon) Pass P0 explicitly to helpers that need it [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 2 1 --- 2024-05-06 Brian Cain New
[PULL,03/15] Hexagon (target/hexagon) Enable more short-circuit packets (HVX) [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,02/15] Hexagon (target/hexagon) Enable more short-circuit packets (scalar core) [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes [PULL,01/15] Hexagon (target/hexagon) Analyze reads before writes - - 1 - --- 2024-05-06 Brian Cain New
[PULL,00/15] Hexagon: simplify gen for packets w/o read-after-write - - - - --- 2024-05-06 Brian Cain New
[v5] target/riscv: Implement dynamic establishment of custom decoder [v5] target/riscv: Implement dynamic establishment of custom decoder - - 2 - --- 2024-05-06 Huang Tao New
[v4] target/loongarch: Add TCG macro in structure CPUArchState [v4] target/loongarch: Add TCG macro in structure CPUArchState - - 1 - --- 2024-05-06 maobibo New
[57/57] target/arm: Convert SQDMULH, SQRDMULH to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[56/57] target/arm: Tidy SQDMULH, SQRDMULH (vector) target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[55/57] target/arm: Convert MLA, MLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[54/57] target/arm: Convert MUL, PMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[53/57] target/arm: Convert SABA, SABD, UABA, UABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[52/57] target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[51/57] target/arm: Convert SRHADD, URHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[50/57] target/arm: Convert SRHADD, URHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[49/57] target/arm: Convert SHSUB, UHSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[48/57] target/arm: Convert SHSUB, UHSUB to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[47/57] target/arm: Convert SHADD, UHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[46/57] target/arm: Convert SHADD, UHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[45/57] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32,i64} target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[44/57] target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[43/57] target/arm: Convert ADD, SUB (vector) to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[42/57] target/arm: Convert SQRSHL, UQRSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[41/57] target/arm: Convert SQRSHL and UQRSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[40/57] target/arm: Convert SQSHL, UQSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[39/57] target/arm: Convert SQSHL and UQSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[38/57] target/arm: Convert SRSHL, URSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[37/57] target/arm: Convert SRSHL and URSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[36/57] target/arm: Convert SSHL, USHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[35/57] target/arm: Convert SUQADD, USQADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[34/57] target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[33/57] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[32/57] target/arm: Inline scalar SUQADD and USQADD target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[31/57] target/arm: Convert SUQADD and USQADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[30/57] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[29/57] target/arm: Convert disas_simd_3same_logic to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[28/57] target/arm: Convert FMLAL, FMLSL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[27/57] target/arm: Use gvec for neon pmax, pmin target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[26/57] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[25/57] target/arm: Use gvec for neon padd target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[24/57] target/arm: Convert ADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[23/57] target/arm: Use gvec for neon faddp, fmaxp, fminp target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[22/57] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[21/57] target/arm: Convert FADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[20/57] target/arm: Convert FRECPS, FRSQRTS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[19/57] target/arm: Convert FABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[18/57] target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[17/57] target/arm: Convert FMLA, FMLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[16/57] target/arm: Convert FNMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[15/57] target/arm: Expand vfp neg and abs inline target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[14/57] target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[13/57] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[12/57] target/arm: Convert FMULX to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[11/57] target/arm: Convert Advanced SIMD copy to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[10/57] target/arm: Convert XAR to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[09/57] target/arm: Convert Cryptographic 3-register, imm2 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[08/57] target/arm: Convert Cryptographic 4-register to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[07/57] target/arm: Convert Cryptographic 2-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[06/57] target/arm: Convert Cryptographic 3-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[05/57] target/arm: Convert Cryptographic 2-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[04/57] target/arm: Convert Cryptographic 3-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[03/57] target/arm: Convert Cryptographic AES to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
[02/57] target/arm: Split out gengvec64.c target/arm: Convert a64 advsimd to decodetree (part 1) - - - - --- 2024-05-06 Richard Henderson New
« 1 2 3 4 … 4280 4281 »