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: Submitter =
Philippe Mathieu-Daudé
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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[10/33] target/mips: Extract df_extract() helper
target/mips: Fully convert MSA opcodes to decodetree
- - - -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[09/33] target/mips: Introduce generic TRANS_CHECK() for decodetree helpers
target/mips: Fully convert MSA opcodes to decodetree
- - - -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[08/33] target/mips: Convert MSA LDI opcode to decodetree
target/mips: Fully convert MSA opcodes to decodetree
- - - -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[07/33] target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v
target/mips: Fully convert MSA opcodes to decodetree
- - 1 -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[06/33] target/mips: Use enum definitions from CPUMIPSMSADataFormat enum
target/mips: Fully convert MSA opcodes to decodetree
- - 1 -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[05/33] target/mips: Have check_msa_access() return a boolean
target/mips: Fully convert MSA opcodes to decodetree
- - - -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[04/33] tests/tcg/mips: Run MSA opcodes tests on user-mode emulation
target/mips: Fully convert MSA opcodes to decodetree
- - - -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[03/33] target/mips: Fix MSA MSUBV.B opcode
target/mips: Fully convert MSA opcodes to decodetree
- 1 1 -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[02/33] target/mips: Fix MSA MADDV.B opcode
target/mips: Fully convert MSA opcodes to decodetree
- 1 1 -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[01/33] tests/tcg: Fix some targets default cross compiler path
target/mips: Fully convert MSA opcodes to decodetree
- 1 1 -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
tests/tcg: Fix some targets default cross compiler path
tests/tcg: Fix some targets default cross compiler path
- 1 - -
-
-
-
2021-10-23
Philippe Mathieu-Daudé
New
[3/3] target/mips: Fix Loongson-3A4000 MSAIR config register
target/mips: MSA opcode fixes
- - 1 -
-
-
-
2021-10-22
Philippe Mathieu-Daudé
New
[2/3] target/mips: Fix MSA MSUBV.B opcode
target/mips: MSA opcode fixes
- 1 1 -
-
-
-
2021-10-22
Philippe Mathieu-Daudé
New
[1/3] target/mips: Fix MSA MADDV.B opcode
target/mips: MSA opcode fixes
- 1 1 -
-
-
-
2021-10-22
Philippe Mathieu-Daudé
New
[PULL,17/17] via-ide: Avoid using isa_get_irq()
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,16/17] vt82c686: Add a method to VIA_ISA to raise ISA interrupts
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 2 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,15/17] vt82c686: Move common code to via_isa_realize
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 2 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,14/17] via-ide: Set user_creatable to false
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,13/17] target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn()
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,12/17] target/mips: Fix DEXTRV_S.H DSP opcode
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- 1 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,11/17] target/mips: Use tcg_constant_tl() in gen_compute_compact_branch()
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,10/17] target/mips: Use explicit extract32() calls in gen_msa_i5()
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,09/17] target/mips: Use tcg_constant_i32() in gen_msa_3rf()
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,08/17] target/mips: Use tcg_constant_i32() in gen_msa_2r()
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,07/17] target/mips: Use tcg_constant_i32() in gen_msa_2rf()
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,06/17] target/mips: Use tcg_constant_i32() in gen_msa_elm_df()
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,05/17] target/mips: Remove unused register from MSA 2R/2RF instruction format
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,04/17] hw/mips/boston: Add FDT generator
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - - -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,03/17] hw/mips/boston: Allow loading elf kernel and dtb
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,02/17] hw/mips/boston: Massage memory map information
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- - 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
[PULL,01/17] target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
- 1 1 -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
[PULL,00/17] MIPS patches for 2021-10-18
- - - -
-
-
-
2021-10-17
Philippe Mathieu-Daudé
New
target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn()
target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn()
- - 1 -
-
-
-
2021-10-14
Philippe Mathieu-Daudé
New
[RFC] target/mips: Fix DEXTRV_S.H DSP opcode
[RFC] target/mips: Fix DEXTRV_S.H DSP opcode
- 1 1 -
-
-
-
2021-10-13
Philippe Mathieu-Daudé
New
target/sh4: Split user/system helpers
target/sh4: Split user/system helpers
- - - -
-
-
-
2021-10-06
Philippe Mathieu-Daudé
New
[4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend
MAINTAINERS: Sanitize 'MIPS TCG CPUs' section
- - 1 -
-
-
-
2021-10-04
Philippe Mathieu-Daudé
New
[3/4] MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware
MAINTAINERS: Sanitize 'MIPS TCG CPUs' section
- - 1 -
-
-
-
2021-10-04
Philippe Mathieu-Daudé
New
[2/4] MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware
MAINTAINERS: Sanitize 'MIPS TCG CPUs' section
- - 1 -
-
-
-
2021-10-04
Philippe Mathieu-Daudé
New
[1/4] MAINTAINERS: Add MIPS general architecture support entry
MAINTAINERS: Sanitize 'MIPS TCG CPUs' section
- - 1 -
-
-
-
2021-10-04
Philippe Mathieu-Daudé
New
MAINTAINERS: Split HPPA TCG vs HPPA machines/hardware
MAINTAINERS: Split HPPA TCG vs HPPA machines/hardware
- - 2 -
-
-
-
2021-10-04
Philippe Mathieu-Daudé
New
[8/8] target/mips: Use tcg_constant_tl() in gen_compute_compact_branch()
target/mips: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[7/8] target/mips: Use tcg_constant_i32() in gen_msa_i5()
target/mips: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[6/8] target/mips: Use explicit extract32() calls in gen_msa_i5()
target/mips: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[5/8] target/mips: Use tcg_constant_i32() in gen_msa_3rf()
target/mips: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[4/8] target/mips: Use tcg_constant_i32() in gen_msa_2r()
target/mips: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[3/8] target/mips: Use tcg_constant_i32() in gen_msa_2rf()
target/mips: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[2/8] target/mips: Use tcg_constant_i32() in gen_msa_elm_df()
target/mips: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[1/8] target/mips: Remove unused register from MSA 2R/2RF instruction format
target/mips: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[3/3] target/arm: Use the constant variant of store_cpu_field() when possible
target/arm: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[2/3] target/arm: Introduce store_cpu_field_constant() helper
target/arm: Use tcg_constant_*
- - - -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[1/3] target/arm: Use tcg_constant_i32() in op_smlad()
target/arm: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
target/s390x: Optimize save_link_info() using extract() TCG opcode
target/s390x: Optimize save_link_info() using extract() TCG opcode
- - - -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
target/m68k: Optimize shift_mem() using extract() TCG opcode
target/m68k: Optimize shift_mem() using extract() TCG opcode
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
target/avr: Optimize various functions using extract opcode
target/avr: Optimize various functions using extract opcode
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[2/2] target/ppc: Use tcg_constant_i64() in gen_brh()
target/ppc: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[1/2] target/ppc: Use tcg_constant_i32() in gen_setb()
target/ppc: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[2/2] target/hexagon: Use tcg_constant_*
target/hexagon: Use tcg_constant_*
- - 2 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[1/2] target/hexagon: Remove unused TCG temporary from predicated loads
target/hexagon: Use tcg_constant_*
- - 2 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
target/mips: Remove unused register from MSA 2R/2RF instruction format
target/mips: Remove unused register from MSA 2R/2RF instruction format
- 2 1 -
-
-
-
2021-10-03
Philippe Mathieu-Daudé
New
[3/3] target/nios2: Use tcg_constant_*
target/nios2: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-02
Philippe Mathieu-Daudé
New
[2/3] target/nios2: Use DisasContext::zero constant instead of temporary
target/nios2: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-02
Philippe Mathieu-Daudé
New
[1/3] target/nios2: Replace load_zero() by zero constant in DisasContext
target/nios2: Use tcg_constant_*
- - 1 -
-
-
-
2021-10-02
Philippe Mathieu-Daudé
New
target/mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl()
target/mips: remove gen_mfc0_load64() and use tcg_gen_ld32s_tl()
- - 2 -
-
-
-
2021-10-02
Philippe Mathieu-Daudé
New
[v3] target/i386: Include 'hw/i386/apic.h' locally
[v3] target/i386: Include 'hw/i386/apic.h' locally
3 - - -
-
-
-
2021-09-29
Philippe Mathieu-Daudé
New
[v2] target/i386: Include 'hw/i386/apic.h' locally
[v2] target/i386: Include 'hw/i386/apic.h' locally
1 - - -
-
-
-
2021-09-29
Philippe Mathieu-Daudé
New
[v4,6/6] tests/acceptance: Rename avocado_qemu.Test -> QemuSystemTest
tests/acceptance: Add bFLT loader linux-user test
- - 1 -
-
-
-
2021-09-27
Philippe Mathieu-Daudé
New
[v4,5/6] tests/acceptance: Add bFLT loader linux-user test
tests/acceptance: Add bFLT loader linux-user test
- - 1 -
-
-
-
2021-09-27
Philippe Mathieu-Daudé
New
[v4,4/6] tests/acceptance: Share useful helpers from virtiofs_submounts test
tests/acceptance: Add bFLT loader linux-user test
- - 2 -
-
-
-
2021-09-27
Philippe Mathieu-Daudé
New
[v4,3/6] tests/acceptance: Introduce QemuUserTest base class
tests/acceptance: Add bFLT loader linux-user test
- - 2 -
-
-
-
2021-09-27
Philippe Mathieu-Daudé
New
[v4,2/6] tests/acceptance: Make pick_default_qemu_bin() more generic
tests/acceptance: Add bFLT loader linux-user test
- - 1 -
-
-
-
2021-09-27
Philippe Mathieu-Daudé
New
[v4,1/6] tests/acceptance: Extract QemuBaseTest from Test
tests/acceptance: Add bFLT loader linux-user test
- - 1 -
-
-
-
2021-09-27
Philippe Mathieu-Daudé
New
[v8,40/40] accel/tcg: Simplify tcg_cpu_has_work()
accel: Move has_work() from CPUClass to AccelOpsClass
- - - -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,39/40] accel/tcg: Remove CPUClass::has_work()
accel: Move has_work() from CPUClass to AccelOpsClass
- - - -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,38/40] target/xtensa: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,37/40] target/tricore: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 2 -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,36/40] target/sparc: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 2 -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,35/40] target/sparc: Remove pointless use of CONFIG_TCG definition
accel: Move has_work() from CPUClass to AccelOpsClass
- - 2 -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,34/40] target/sh4: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,33/40] target/s390x: Restrict has_work() handler to sysemu and TCG
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,32/40] target/rx: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
-
-
-
2021-09-26
Philippe Mathieu-Daudé
New
[v8,31/40] target/riscv: Restrict has_work() handler to sysemu and TCG
accel: Move has_work() from CPUClass to AccelOpsClass
1 - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,29/40] target/ppc: Introduce PowerPCCPUClass::has_work()
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,28/40] target/openrisc: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,27/40] target/nios2: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,26/40] target/mips: Restrict has_work() handler to sysemu and TCG
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,25/40] target/microblaze: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
-
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,24/40] target/m68k: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
-
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,23/40] target/i386: Restrict has_work() handler to sysemu and TCG
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,22/40] target/hppa: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,21/40] target/hexagon: Remove unused has_work() handler
accel: Move has_work() from CPUClass to AccelOpsClass
- - 2 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,20/40] target/cris: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,19/40] target/avr: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - 2 -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,18/40] target/alpha: Restrict has_work() handler to sysemu
accel: Move has_work() from CPUClass to AccelOpsClass
- - - -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,17/40] target/arm: Restrict has_work() handler to sysemu and TCG
accel: Move has_work() from CPUClass to AccelOpsClass
- - - -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,16/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work
accel: Move has_work() from CPUClass to AccelOpsClass
- - - -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,15/40] accel/tcg: Introduce TCGCPUOps::has_work()
accel: Move has_work() from CPUClass to AccelOpsClass
- - - -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,14/40] accel: Simplify cpu_has_work()
accel: Move has_work() from CPUClass to AccelOpsClass
- - - -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,13/40] accel/tcg: Implement AccelOpsClass::has_work()
accel: Move has_work() from CPUClass to AccelOpsClass
- - - -
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2021-09-26
Philippe Mathieu-Daudé
New
[v8,12/40] accel/qtest: Implement AccelOpsClass::has_work()
accel: Move has_work() from CPUClass to AccelOpsClass
- - 1 -
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2021-09-26
Philippe Mathieu-Daudé
New
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