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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v2,6/9] test-write-threshold: drop extra tests block: refactor write threshold - - 1 - --- 2021-05-04 Vladimir Sementsov-Ogievskiy New
[v2,5/9] block/write-threshold: don't use aio context lock block: refactor write threshold - - 1 - --- 2021-05-04 Vladimir Sementsov-Ogievskiy New
[v2,4/9] block/write-threshold: drop extra APIs block: refactor write threshold - - 1 - --- 2021-05-04 Vladimir Sementsov-Ogievskiy New
[v2,3/9] test-write-threshold: rewrite test_threshold_(not_)trigger tests block: refactor write threshold - - 1 - --- 2021-05-04 Vladimir Sementsov-Ogievskiy New
[v2,2/9] block: drop write notifiers block: refactor write threshold - - 1 - --- 2021-05-04 Vladimir Sementsov-Ogievskiy New
[v2,1/9] block/write-threshold: don't use write notifiers block: refactor write threshold - - 1 - --- 2021-05-04 Vladimir Sementsov-Ogievskiy New
[PULL,46/46] hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset() [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,45/46] hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset() [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,44/46] hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset() [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,43/46] target/ppc: removed VSCR from SPR registration [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,42/46] target/ppc: Reduce the size of ppc_spr_t [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,41/46] target/ppc: Clean up _spr_register et al [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,40/46] target/ppc: Add POWER10 exception model [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 1 --- 2021-05-04 David Gibson New
[PULL,39/46] target/ppc: rework AIL logic in interrupt delivery [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 1 --- 2021-05-04 David Gibson New
[PULL,38/46] target/ppc: move opcode table logic to translate.c [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,37/46] target/ppc: code motion from translate_init.c.inc to gdbstub.c [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,36/46] spapr_drc.c: handle hotunplug errors in drc_unisolate_logical() [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,35/46] spapr.h: increase FDT_MAX_SIZE [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,34/46] spapr.c: do not use MachineClass::max_cpus to limit CPUs [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,33/46] ppc: Rename current DAWR macros and variables [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 2 - --- 2021-05-04 David Gibson New
[PULL,32/46] target/ppc: POWER10 supports scv [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,31/46] target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,30/46] docs/system: ppc: Add documentation for ppce500 machine [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,29/46] roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,28/46] roms/Makefile: Update ppce500 u-boot build directory name [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,27/46] ppc/spapr: Add support for implement support for H_SCM_HEALTH [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,26/46] spapr: Rename RTAS_MAX_ADDR to FDT_MAX_ADDR [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,25/46] hw/ppc: Add emulation of Genesi/bPlan Pegasos II [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,24/46] hw/pci-host: Add emulation of Marvell MV64361 PPC system controller [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,23/46] vt82c686: Add emulation of VT8231 south bridge [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,22/46] vt82c686: Introduce abstract TYPE_VIA_ISA and base vt82c686b_isa on it [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,21/46] vt82c686: Add VT8231_SUPERIO based on VIA_SUPERIO [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,20/46] vt82c686: QOM-ify superio related functionality [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,19/46] target/ppc: Validate hflags with CONFIG_DEBUG_TCG [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,18/46] linux-user/ppc: Fix msr updates for signal handling [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,17/46] target/ppc: Remove env->immu_idx and env->dmmu_idx [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,16/46] target/ppc: Remove MSR_SA and MSR_AP from hflags [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,15/46] target/ppc: Put LPCR[GTSE] in hflags [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,14/46] target/ppc: Create helper_scv [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,13/46] target/ppc: Put dbcr0 single-step bits into hflags [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,12/46] target/ppc: Reduce env->hflags to uint32_t [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 2 - --- 2021-05-04 David Gibson New
[PULL,11/46] target/ppc: Disconnect hflags from MSR [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,10/46] target/ppc: Extract post_load_update_msr [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,09/46] hw/ppc/spapr_rtas: Update hflags after setting msr [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,08/46] hw/ppc/pnv_core: Update hflags after setting msr [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - - - --- 2021-05-04 David Gibson New
[PULL,07/46] target/ppc: Fix comment for MSR_FE{0,1} [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,06/46] target/ppc: Retain hflags_nmsr only for migration [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,05/46] target/ppc: Do not call hreg_compute_mem_idx after ppc_store_msr [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,04/46] target/ppc: Properly sync cpu state with new msr in cpu_load_old [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,03/46] target/ppc: Move 601 hflags adjustment to hreg_compute_hflags [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,02/46] target/ppc: Move helper_regs.h functions out-of-line [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB [PULL,01/46] hw/ppc/mac_newworld: Restrict RAM to 2 GiB - - 1 - --- 2021-05-04 David Gibson New
[PULL,00/46] ppc-for-6.1 queue 20210504 - - - - --- 2021-05-04 David Gibson New
[7/7] tests/acceptance: Move _console_interaction to ConsoleMixIn tests/acceptance: Introducing the ConsoleMixIn - - 1 - --- 2021-05-03 Wainer dos Santos Moschetta New
[6/7] tests/acceptance: Move wait_for_console_pattern to ConsoleMixIn tests/acceptance: Introducing the ConsoleMixIn - - - - --- 2021-05-03 Wainer dos Santos Moschetta New
[5/7] tests/acceptance: replay_kernel: Remove unused wait_for_console_pattern tests/acceptance: Introducing the ConsoleMixIn - - 1 - --- 2021-05-03 Wainer dos Santos Moschetta New
[4/7] tests/acceptance: Sun4uMachine: Remove dependency to LinuxKernelTest tests/acceptance: Introducing the ConsoleMixIn - - 1 - --- 2021-05-03 Wainer dos Santos Moschetta New
[3/7] tests/acceptance: Move exec_command_and_wait_for_pattern to ConsoleMixIn tests/acceptance: Introducing the ConsoleMixIn - - - - --- 2021-05-03 Wainer dos Santos Moschetta New
[2/7] tests/acceptance: Move exec_command to ConsoleMixIn tests/acceptance: Introducing the ConsoleMixIn - - - - --- 2021-05-03 Wainer dos Santos Moschetta New
[1/7] tests/acceptance: Introduce the ConsoleMixIn class tests/acceptance: Introducing the ConsoleMixIn - - - - --- 2021-05-03 Wainer dos Santos Moschetta New
[v1,1/1] docs/system: Move the RISC-V -bios information to removed [v1,1/1] docs/system: Move the RISC-V -bios information to removed - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,42/42] target/riscv: Fix the RV64H decode comment [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,41/42] target/riscv: Consolidate RV32/64 16-bit instructions [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,40/42] target/riscv: Consolidate RV32/64 32-bit instructions [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,39/42] target/riscv: Remove an unused CASE_OP_32_64 macro [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,38/42] target/riscv: Remove the unused HSTATUS_WPRI macro [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,37/42] target/riscv: Remove the hardcoded SATP_MODE macro [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,36/42] target/riscv: Remove the hardcoded MSTATUS_SD macro [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,35/42] target/riscv: Remove the hardcoded HGATP_MODE macro [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,34/42] target/riscv: Remove the hardcoded SSTATUS_SD macro [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,33/42] target/riscv: Remove the hardcoded RVXLEN macro [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,32/42] target/riscv: fix a typo with interrupt names [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,31/42] fpu/softfloat: set invalid excp flag for RISC-V muladd instructions [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,30/42] hw/riscv: Fix OT IBEX reset vector [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,29/42] target/riscv: fix exception index on instruction access fault [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,28/42] target/riscv: fix vrgather macro index variable type bug [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,27/42] target/riscv: Add ePMP support for the Ibex CPU [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,26/42] target/riscv/pmp: Remove outdated comment [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,25/42] target/riscv: Add a config option for ePMP [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,24/42] target/riscv: Implementation of enhanced PMP (ePMP) [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,23/42] target/riscv: Add ePMP CSR access functions [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,22/42] target/riscv: Add the ePMP feature [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,21/42] target/riscv: Define ePMP mseccfg [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 3 - --- 2021-05-03 Alistair Francis New
[PULL,20/42] target/riscv: Fix the PMP is locked check when using TOR [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,19/42] docs: Add documentation for shakti_c machine [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,18/42] target/riscv: Fixup saturate subtract function [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,17/42] riscv: don't look at SUM when accessing memory from a debugger context [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,16/42] hw/riscv: Enable VIRTIO_VGA for RISC-V virt machine [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,15/42] hw/opentitan: Update the interrupt layout [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,14/42] MAINTAINERS: Update the RISC-V CPU Maintainers [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code 2 - 1 - --- 2021-05-03 Alistair Francis New
[PULL,13/42] target/riscv: Use RISCVException enum for CSR access [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,12/42] target/riscv: Use the RISCVException enum for CSR operations [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,11/42] target/riscv: Fix 32-bit HS mode access permissions [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,10/42] target/riscv: Use the RISCVException enum for CSR predicates [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,09/42] target/riscv: Convert the RISC-V exceptions to an enum [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 2 - --- 2021-05-03 Alistair Francis New
[PULL,08/42] hw/riscv: Connect Shakti UART to Shakti platform [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,07/42] hw/char: Add Shakti UART emulation [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,06/42] riscv: Add initial support for Shakti C machine [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,05/42] target/riscv: Add Shakti C class CPU [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - - 1 - --- 2021-05-03 Alistair Francis New
[PULL,04/42] hw/riscv: sifive_e: Add 'const' to sifive_e_memmap[] [PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code - 1 2 - --- 2021-05-03 Alistair Francis New
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