From patchwork Sun Sep 18 20:24:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1679078 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MVznZ4Z7fz1ync for ; Mon, 19 Sep 2022 06:25:06 +1000 (AEST) Received: from localhost ([::1]:41774 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oa0qe-00042N-El for incoming@patchwork.ozlabs.org; Sun, 18 Sep 2022 16:25:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45426) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oa0q3-0003zL-BB; Sun, 18 Sep 2022 16:24:27 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:51107) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oa0q0-000482-AY; Sun, 18 Sep 2022 16:24:27 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 7C92B75A163; Sun, 18 Sep 2022 22:24:20 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 14CB375A150; Sun, 18 Sep 2022 22:24:20 +0200 (CEST) Message-Id: From: BALATON Zoltan Subject: [PATCH v5 00/21] ppc4xx_sdram QOMify and clean ups MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: clg@kaod.org, Daniel Henrique Barboza , Peter Maydell Date: Sun, 18 Sep 2022 22:24:20 +0200 (CEST) X-Spam-Probability: 8% Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This is the end of the QOMify series started by Cédric. This series handles the SDRAM controller models to clean them up, QOMify and unify them and at least partially clean up the mess that has accumulated around these in the past. This includes the not yet merged patches from the last series and new ones that change the DDR2 version used by sam460ex. v5: Add functions the enable sdram controller and call it from boards v4: address more review comments v3: Fix patches that got squashed during rebase v2: address some review comments and try to avoid compile problem with gcc 12.2 (untested) BALATON Zoltan (21): ppc440_bamboo: Remove unnecessary memsets ppc4xx: Introduce Ppc4xxSdramBank struct ppc4xx_sdram: Get rid of the init RAM hack ppc4xx: Use Ppc4xxSdramBank in ppc4xx_sdram_banks() ppc440_bamboo: Add missing 4 MiB valid memory size ppc4xx_sdram: Move size check to ppc4xx_sdram_init() ppc4xx_sdram: QOM'ify ppc4xx_sdram: Drop extra zeros for readability ppc440_sdram: Split off map/unmap of sdram banks for later reuse ppc440_sdram: Implement enable bit in the DDR2 SDRAM ppc440_sdram: Get rid of the init RAM hack ppc440_sdram: Rename local variable for readability ppc4xx_sdram: Rename functions to prevent name clashes ppc440_sdram: Move RAM size check to ppc440_sdram_init ppc440_sdram: QOM'ify ppc4xx_sdram: Move ppc4xx DDR and DDR2 SDRAM controller models together ppc4xx_sdram: Use hwaddr for memory bank size ppc4xx_sdram: Rename local state variable for brevity ppc4xx_sdram: Generalise bank setup ppc4xx_sdram: Convert DDR SDRAM controller to new bank handling ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks() hw/ppc/meson.build | 3 +- hw/ppc/ppc405.h | 8 +- hw/ppc/ppc405_boards.c | 13 +- hw/ppc/ppc405_uc.c | 33 +- hw/ppc/ppc440.h | 4 - hw/ppc/ppc440_bamboo.c | 25 +- hw/ppc/ppc440_uc.c | 267 +------------- hw/ppc/ppc4xx_devs.c | 413 ---------------------- hw/ppc/ppc4xx_sdram.c | 754 ++++++++++++++++++++++++++++++++++++++++ hw/ppc/sam460ex.c | 44 +-- hw/ppc/trace-events | 1 + include/hw/ppc/ppc4xx.h | 65 +++- 12 files changed, 860 insertions(+), 770 deletions(-) create mode 100644 hw/ppc/ppc4xx_sdram.c