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Wed, 31 May 2023 07:23:12 -0700 (PDT) From: Sunil V L To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrea Bolognani , Sunil V L Subject: [PATCH v6 0/3] hw/riscv/virt: pflash improvements Date: Wed, 31 May 2023 19:52:57 +0530 Message-Id: <20230531142300.9114-1-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22c; envelope-from=sunilvl@ventanamicro.com; helo=mail-oi1-x22c.google.com X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SORBS_WEB=1.5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This series improves the pflash usage in RISC-V virt machine with solutions to below issues. 1) Currently the first pflash is reserved for ROM/M-mode firmware code. But S-mode payload firmware like EDK2 need both pflash devices to have separate code and variable store so that OS distros can keep the FW code as read-only. The issue is reported at https://salsa.debian.org/qemu-team/edk2/-/commit/c345655a0149f64c5020bfc1e53c619ce60587f6 2) The latest way of using pflash devices in other architectures and libvirt is by using -blockdev and machine options. However, currently this method is not working in RISC-V. With above issues fixed, added documentation on how to use pflash devices in RISC-V virt machine. This patch series is based on Alistair's riscv-to-apply.next branch. Changes since v5: 1) Added KVM use case as per feedback from Anup. Updated the documentation patch that only S-mode payload is supported for KVM guests. Tested with KVM enabled. 2) Updated tags. Changes since v4: 1) Updated patch 2 to avoid accessing private field as per feedback from Philippe. 2) Updated documentation patch to add read-only for ROM usage. 3) Rebased to latest riscv-to-apply.next branch and updated tags. Changes since v3: 1) Converted single patch to a series with a cover letter since there are multiple patches now. 2) Added a new patch to enable pflash usage via -blockdev option. 3) Separated the documentation change into new patch and updated the documentation to mention only -blockdev option which seems to be the recommended way of using pflash. Changes since v2: 1) Reverted v2 changes and used v1 approach so that pflash0 can be used for code and pflash1 for variable store. 2) Rebased to latest riscv-to-apply.next branch. 3) Added documentation for pflash usage. Changes since v1: 1) Simplified the fix such that it doesn't break current EDK2. Sunil V L (3): hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none" riscv/virt: Support using pflash via -blockdev option docs/system: riscv: Add pflash usage details docs/system/riscv/virt.rst | 43 +++++++++++++++++++++++++++ hw/riscv/virt.c | 59 ++++++++++++++++---------------------- 2 files changed, 68 insertions(+), 34 deletions(-)