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([2602:47:d48c:8101:a909:891c:953d:a6b0]) by smtp.gmail.com with ESMTPSA id w13-20020a170902ca0d00b00178b77b7e71sm4743617pld.188.2023.01.08.17.42.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jan 2023 17:42:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 00/22] tcg: exit_tb tidy, goto_tb reorg Date: Sun, 8 Jan 2023 17:42:26 -0800 Message-Id: <20230109014248.2894281-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Small patch for exit_tb. Large reorg for goto_tb, primarily aimed at fixing a race condition in which a host thread gets suspended in the middle of executing a two insn sequence, and the sequence is updated. The updated second insn does not match the previous first insn, so when the thread restarts the entire sequence will not branch to either the old or the new destination. The middle-end is adjusted to support both direct and indirect jumps simultaneously, instead of depending on TCG_TARGET_HAS_direct_jump. This allows the backend to decide whether to use direct or indirect based on the branch displacement. Which allows us to only update a single instruction, which means there's no multi-insn sequence that can be interrupted. Changes for v2: * Rebase on master, * Remove if (0) accidentially left in tcg/sparc64/. r~ Richard Henderson (22): tcg: Split out tcg_out_exit_tb tcg/i386: Remove unused goto_tb code for indirect jump tcg/ppc: Remove unused goto_tb code for indirect jump tcg/sparc64: Remove unused goto_tb code for indirect jump tcg: Replace asserts on tcg_jmp_insn_offset tcg: Introduce set_jmp_insn_offset tcg: Introduce get_jmp_target_addr tcg: Split out tcg_out_goto_tb tcg: Rename TB_JMP_RESET_OFFSET_INVALID to TB_JMP_OFFSET_INVALID tcg: Add gen_tb to TCGContext tcg: Add TranslationBlock.jmp_insn_offset tcg: Change tb_target_set_jmp_target arguments tcg: Move tb_target_set_jmp_target declaration to tcg.h tcg: Always define tb_target_set_jmp_target tcg: Remove TCG_TARGET_HAS_direct_jump tcg/aarch64: Reorg goto_tb implementation tcg/ppc: Reorg goto_tb implementation tcg/sparc64: Remove USE_REG_TB tcg/sparc64: Reorg goto_tb implementation tcg/arm: Implement direct branch for goto_tb tcg/riscv: Introduce OPC_NOP tcg/riscv: Implement direct branch for goto_tb include/exec/exec-all.h | 5 +- include/tcg/tcg.h | 14 +-- tcg/aarch64/tcg-target.h | 7 +- tcg/arm/tcg-target.h | 5 - tcg/i386/tcg-target.h | 9 -- tcg/loongarch64/tcg-target.h | 3 - tcg/mips/tcg-target.h | 5 - tcg/ppc/tcg-target.h | 7 +- tcg/riscv/tcg-target.h | 4 - tcg/s390x/tcg-target.h | 11 -- tcg/sparc64/tcg-target.h | 4 - tcg/tci/tcg-target.h | 4 - accel/tcg/cpu-exec.c | 16 ++- accel/tcg/translate-all.c | 10 +- tcg/tcg-op.c | 14 +-- tcg/tcg.c | 42 +++++-- tcg/aarch64/tcg-target.c.inc | 104 ++++++++-------- tcg/arm/tcg-target.c.inc | 89 +++++++++----- tcg/i386/tcg-target.c.inc | 68 ++++++----- tcg/loongarch64/tcg-target.c.inc | 66 +++++----- tcg/mips/tcg-target.c.inc | 59 +++++---- tcg/ppc/tcg-target.c.inc | 193 +++++++++-------------------- tcg/riscv/tcg-target.c.inc | 65 +++++++--- tcg/s390x/tcg-target.c.inc | 67 +++++++---- tcg/sparc64/tcg-target.c.inc | 201 ++++++++++++------------------- tcg/tci/tcg-target.c.inc | 31 +++-- 26 files changed, 522 insertions(+), 581 deletions(-)