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Thu, 14 Jul 2022 11:00:24 -0700 (PDT) Date: Thu, 14 Jul 2022 10:59:58 -0700 Message-Id: <20220714180006.77360-1-wuhaotsh@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.37.0.170.g444d1eabd0-goog Subject: [PATCH 0/8] Misc NPCM7XX patches From: Hao Wu To: peter.maydell@linaro.org Cc: richard.henderson@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, wuhaotsh@google.com, venture@google.com, Avi.Fishman@nuvoton.com, kfting@nuvoton.com, hskinnemoen@google.com, f4bug@amsat.org, bin.meng@windriver.com, qemu-block@nongnu.org, armbru@redhat.com, thuth@redhat.com Received-SPF: pass client-ip=2607:f8b0:4864:20::449; envelope-from=3uFnQYggKCskB9wp387wv33v0t.r315t19-stAt0232v29.36v@flex--wuhaotsh.bounces.google.com; helo=mail-pf1-x449.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, USER_IN_DEF_DKIM_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" [NOTE: I'm reviving a bunch of patches that was in the process of upstreaming a while ago but paused.] This patch set contains a few bug fixes and I2C devices for some NPCM7XX boards. Patch 1~2 fix a problem that causes the SMBus module to behave incorrectly when it's in FIFO mode and trying to receive more than 16 bytes at a time. Patch 3 fixes a error in a register for ADC module. Patch 4 makes the ADC input to be R/W instead of write only. It allows a test system to read these via QMP and has no negative effect. Patch 5 adds a new blockdev IF type IF_OTHER. Patch 6 allows at24c_eeprom_init to take a bus as parameter so it can be used by more use cases (e.g. behind an I2C mux.) Patch 7 allows at24c_eeprom_init to take a drive as property, similar to sdhci_attach_device(). Patch 8 uses the function defined in patch 5 to add the EEPROM and other I2C devices for Quanta GBS board. -- Changes since v4: 1. Add comments to patch 5. 2. Split patch 6 into 2 patches according to the feedback. Each patch does it own task. -- Changes since v3: 1. Add a new blockdev IF type IF_OTHER. 2. Use IF_OTHER instead of IF_NONE. -- Changes since v2: 1. Dropped patch 7. 2. Drop an extra variable in patch 5. -- Changes since v1: 1. Rewrote patch 5 to implement the function in NPCM7xx board file instead of the EEPROM device file. 2. Slightly modify patch 6 to adapt to the changes and QEMU comment style. 3. Squash patch 7 into patch 5 to make it compile. 4. Add a new patch 7. Hao Wu (7): hw/i2c: Clear ACK bit in NPCM7xx SMBus module hw/i2c: Read FIFO during RXF_CTL change in NPCM7XX SMBus hw/adc: Fix CONV bit in NPCM7XX ADC CON register hw/adc: Make adci[*] R/W in NPCM7XX ADC blockdev: Add a new IF type IF_OTHER hw/arm: npcm8xx_boards: EEPROMs can take bus as parameter hw/arm: Set drive property for at24c eeprom Patrick Venture (1): hw/arm: quanta-gbs-bmc add i2c devices blockdev.c | 4 +- hw/adc/npcm7xx_adc.c | 4 +- hw/arm/npcm7xx_boards.c | 102 ++++++++++++++++++++------------- hw/i2c/npcm7xx_smbus.c | 8 +-- include/sysemu/blockdev.h | 1 + tests/qtest/npcm7xx_adc-test.c | 2 +- 6 files changed, 73 insertions(+), 48 deletions(-)