| Message ID | 20220124184605.999353-1-farosas@linux.ibm.com |
|---|---|
| Headers | show |
| Series | target/ppc: powerpc_excp improvements [BookS] (4/n) | expand |
On 1/24/22 19:46, Fabiano Rosas wrote: > This series splits the exception code for BookS CPUs: 970, POWER5+, > POWER7, POWER8, POWER9, POWER10. After dealing with the 405, let's go > back to something more familiar to give everyone a break. > > No upfront fixes this time. The pseries code gets used a lot, so there > are no obvious issues and the older BookS CPUs get the benefits by > default since they are similar. Super ! I think this series can go in directly. I would only change the name to book3s because it fits better the current naming in QEMU and Linux. Thanks, C.
Cédric Le Goater <clg@kaod.org> writes: > On 1/24/22 19:46, Fabiano Rosas wrote: >> This series splits the exception code for BookS CPUs: 970, POWER5+, >> POWER7, POWER8, POWER9, POWER10. After dealing with the 405, let's go >> back to something more familiar to give everyone a break. >> >> No upfront fixes this time. The pseries code gets used a lot, so there >> are no obvious issues and the older BookS CPUs get the benefits by >> default since they are similar. > > Super ! I think this series can go in directly. I would only change > the name to book3s because it fits better the current naming in QEMU > and Linux. Not that it matters that much, but QEMU emulates Books I and II as well, doesn't it? Book I, Power ISA User Instruction Set Architecture, covers the base instruction set and related facilities available to the application programmer. Book II, Power ISA Virtual Environment Architecture, defines the storage model and other instructions and facilities that enable the application programmer to cre- ate multithreaded programs and programs that interact with certain physical realities of the computing environ- ment. Book III, Power ISA Operating Environment Architec- ture, defines the supervisor instructions and related facilities. Anyway, I'm OK with either name. > > Thanks, > > C.
On 1/25/22 15:54, Fabiano Rosas wrote: > Cédric Le Goater <clg@kaod.org> writes: > >> On 1/24/22 19:46, Fabiano Rosas wrote: >>> This series splits the exception code for BookS CPUs: 970, POWER5+, >>> POWER7, POWER8, POWER9, POWER10. After dealing with the 405, let's go >>> back to something more familiar to give everyone a break. >>> >>> No upfront fixes this time. The pseries code gets used a lot, so there >>> are no obvious issues and the older BookS CPUs get the benefits by >>> default since they are similar. >> >> Super ! I think this series can go in directly. I would only change >> the name to book3s because it fits better the current naming in QEMU >> and Linux. > > Not that it matters that much, but QEMU emulates Books I and II as well, > doesn't it? yes. it's just a naming convention that we use everywhere. See : https://www.kernel.org/doc/html/latest/powerpc/cpu_families.html book3s is even a larger family, it includes all the 32bit .. I would vote for 'book3s_arch2x' to be in sync with the is_book3s_arch2x() helper. Thanks, C. > Book I, Power ISA User Instruction Set Architecture, > covers the base instruction set and related facilities > available to the application programmer. > > Book II, Power ISA Virtual Environment Architecture, > defines the storage model and other instructions and > facilities that enable the application programmer to cre- > ate multithreaded programs and programs that interact > with certain physical realities of the computing environ- > ment. > > Book III, Power ISA Operating Environment Architec- > ture, defines the supervisor instructions and related > facilities. > > Anyway, I'm OK with either name. > >> >> Thanks, >> >> C.