| Message ID | 20210818201931.393394-1-richard.henderson@linaro.org |
|---|---|
| Headers | show |
| Series | tcg/mips: Unaligned access and other cleanup | expand |
Cc'ing Jiaxun & Huacai. On 8/18/21 10:19 PM, Richard Henderson wrote: > Based-on: <20210818191920.390759-1-richard.henderson@linaro.org> > ("[PATCH v3 00/66] Unaligned access for user-only") > > Important points: > * Support unaligned accesses. > * Drop requirement for 256MB alignment of code_gen_buffer. > * Improvements to tcg_out_movi: > - Have a tb-relative register for mips64, reducing the > code size for most pointers, > - Try a few 3-insn sequences, > - Drop everything else into a constant pool. > > > r~ > > > Richard Henderson (16): > tcg/mips: Support unaligned access for user-only > tcg/mips: Support unaligned access for softmmu > tcg/mips: Drop inline markers > tcg/mips: Move TCG_AREG0 to S8 > tcg/mips: Move TCG_GUEST_BASE_REG to S7 > tcg/mips: Unify TCG_GUEST_BASE_REG tests > tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr > tcg/mips: Unset TCG_TARGET_HAS_direct_jump > tcg/mips: Drop special alignment for code_gen_buffer > tcg/mips: Create and use TCG_REG_TB > tcg/mips: Split out tcg_out_movi_one > tcg/mips: Split out tcg_out_movi_two > tcg/mips: Use the constant pool for 64-bit constants > tcg/mips: Aggressively use the constant pool for n64 calls > tcg/mips: Try tb-relative addresses in tcg_out_movi > tcg/mips: Try three insns with shift and add in tcg_out_movi > > tcg/mips/tcg-target.h | 17 +- > tcg/region.c | 91 ----- > tcg/mips/tcg-target.c.inc | 730 +++++++++++++++++++++++++++++++------- > 3 files changed, 604 insertions(+), 234 deletions(-) >
Sorry, use Huacai's newer email . On Thu, Aug 19, 2021 at 12:07 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > > Cc'ing Jiaxun & Huacai. > > On 8/18/21 10:19 PM, Richard Henderson wrote: > > Based-on: <20210818191920.390759-1-richard.henderson@linaro.org> > > ("[PATCH v3 00/66] Unaligned access for user-only") > > > > Important points: > > * Support unaligned accesses. > > * Drop requirement for 256MB alignment of code_gen_buffer. > > * Improvements to tcg_out_movi: > > - Have a tb-relative register for mips64, reducing the > > code size for most pointers, > > - Try a few 3-insn sequences, > > - Drop everything else into a constant pool. > > > > > > r~ > > > > > > Richard Henderson (16): > > tcg/mips: Support unaligned access for user-only > > tcg/mips: Support unaligned access for softmmu > > tcg/mips: Drop inline markers > > tcg/mips: Move TCG_AREG0 to S8 > > tcg/mips: Move TCG_GUEST_BASE_REG to S7 > > tcg/mips: Unify TCG_GUEST_BASE_REG tests > > tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr > > tcg/mips: Unset TCG_TARGET_HAS_direct_jump > > tcg/mips: Drop special alignment for code_gen_buffer > > tcg/mips: Create and use TCG_REG_TB > > tcg/mips: Split out tcg_out_movi_one > > tcg/mips: Split out tcg_out_movi_two > > tcg/mips: Use the constant pool for 64-bit constants > > tcg/mips: Aggressively use the constant pool for n64 calls > > tcg/mips: Try tb-relative addresses in tcg_out_movi > > tcg/mips: Try three insns with shift and add in tcg_out_movi > > > > tcg/mips/tcg-target.h | 17 +- > > tcg/region.c | 91 ----- > > tcg/mips/tcg-target.c.inc | 730 +++++++++++++++++++++++++++++++------- > > 3 files changed, 604 insertions(+), 234 deletions(-) > > >
Hi, Jiaxun, I'm not familiar with TCG, please review, thanks. Huacai On Thu, Aug 19, 2021 at 6:09 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > > Sorry, use Huacai's newer email . > > On Thu, Aug 19, 2021 at 12:07 AM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > > > > Cc'ing Jiaxun & Huacai. > > > > On 8/18/21 10:19 PM, Richard Henderson wrote: > > > Based-on: <20210818191920.390759-1-richard.henderson@linaro.org> > > > ("[PATCH v3 00/66] Unaligned access for user-only") > > > > > > Important points: > > > * Support unaligned accesses. > > > * Drop requirement for 256MB alignment of code_gen_buffer. > > > * Improvements to tcg_out_movi: > > > - Have a tb-relative register for mips64, reducing the > > > code size for most pointers, > > > - Try a few 3-insn sequences, > > > - Drop everything else into a constant pool. > > > > > > > > > r~ > > > > > > > > > Richard Henderson (16): > > > tcg/mips: Support unaligned access for user-only > > > tcg/mips: Support unaligned access for softmmu > > > tcg/mips: Drop inline markers > > > tcg/mips: Move TCG_AREG0 to S8 > > > tcg/mips: Move TCG_GUEST_BASE_REG to S7 > > > tcg/mips: Unify TCG_GUEST_BASE_REG tests > > > tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr > > > tcg/mips: Unset TCG_TARGET_HAS_direct_jump > > > tcg/mips: Drop special alignment for code_gen_buffer > > > tcg/mips: Create and use TCG_REG_TB > > > tcg/mips: Split out tcg_out_movi_one > > > tcg/mips: Split out tcg_out_movi_two > > > tcg/mips: Use the constant pool for 64-bit constants > > > tcg/mips: Aggressively use the constant pool for n64 calls > > > tcg/mips: Try tb-relative addresses in tcg_out_movi > > > tcg/mips: Try three insns with shift and add in tcg_out_movi > > > > > > tcg/mips/tcg-target.h | 17 +- > > > tcg/region.c | 91 ----- > > > tcg/mips/tcg-target.c.inc | 730 +++++++++++++++++++++++++++++++------- > > > 3 files changed, 604 insertions(+), 234 deletions(-) > > > > >
Based-on: <20210818191920.390759-1-richard.henderson@linaro.org> ("[PATCH v3 00/66] Unaligned access for user-only") Important points: * Support unaligned accesses. * Drop requirement for 256MB alignment of code_gen_buffer. * Improvements to tcg_out_movi: - Have a tb-relative register for mips64, reducing the code size for most pointers, - Try a few 3-insn sequences, - Drop everything else into a constant pool. r~ Richard Henderson (16): tcg/mips: Support unaligned access for user-only tcg/mips: Support unaligned access for softmmu tcg/mips: Drop inline markers tcg/mips: Move TCG_AREG0 to S8 tcg/mips: Move TCG_GUEST_BASE_REG to S7 tcg/mips: Unify TCG_GUEST_BASE_REG tests tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr tcg/mips: Unset TCG_TARGET_HAS_direct_jump tcg/mips: Drop special alignment for code_gen_buffer tcg/mips: Create and use TCG_REG_TB tcg/mips: Split out tcg_out_movi_one tcg/mips: Split out tcg_out_movi_two tcg/mips: Use the constant pool for 64-bit constants tcg/mips: Aggressively use the constant pool for n64 calls tcg/mips: Try tb-relative addresses in tcg_out_movi tcg/mips: Try three insns with shift and add in tcg_out_movi tcg/mips/tcg-target.h | 17 +- tcg/region.c | 91 ----- tcg/mips/tcg-target.c.inc | 730 +++++++++++++++++++++++++++++++------- 3 files changed, 604 insertions(+), 234 deletions(-)