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[0/2] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr

Message ID 20210813110149.1432692-1-f4bug@amsat.org
Headers show
Series target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr | expand

Message

Philippe Mathieu-Daudé Aug. 13, 2021, 11:01 a.m. UTC 
Raise Loongson-3A1000 SEGBITS from 40 to 48.

Philippe Mathieu-Daudé (2):
  target/mips: Document Loongson-3A CPU definitions
  target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr

 target/mips/cpu-defs.c.inc | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Philippe Mathieu-Daudé Aug. 25, 2021, 10:50 a.m. UTC | #1 
On 8/13/21 1:01 PM, Philippe Mathieu-Daudé wrote:
> Raise Loongson-3A1000 SEGBITS from 40 to 48.
> 
> Philippe Mathieu-Daudé (2):
>   target/mips: Document Loongson-3A CPU definitions
>   target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr

Thanks, applied to mips-next.