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[81.40.121.39]) by smtp.gmail.com with ESMTPSA id y17sm20042775wrq.76.2021.04.18.09.31.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Apr 2021 09:31:36 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 00/26] target/mips: Re-org to allow KVM-only builds Date: Sun, 18 Apr 2021 18:31:08 +0200 Message-Id: <20210418163134.1133100-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x432.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Huacai Chen , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" TL;DR: This series restrict TCG-specific objects by moving them to the tcg/ subdir. Code is moved around to satisfy 3 cases: { generic sysemu / tcg sysemu / tcg user}. Hi, This series move the MIPS TCG files under target/mips/tcg/. tcg/ is split into {sysemu and user}, and code common to both user/sysemu is left under tcg/ root. Non-user code is moved to sysemu/ (common to TCG and KVM). - Patches 1 & 6 are Meson generic - Patches 2 to 5 move generic symbols around to satisfly KVM linking - Patch 8 introduces tcg-internal.h where we'll move TCG specific prototypes from the current big internal.h - Patches 9-24 move code by topic (first user, then sysemu, then tcg) - Patch 25 restrict TCG specific machines to TCG (to actually only build malta/loongson3-virt machines when restricted to KVM) - Patch 26 finally add a CI job with "KVM-only" config: https://gitlab.com/philmd/qemu/-/jobs/1189874868 (12min 5sec) Diffstat is not that bad, and many #ifdef'ry removed. Please review, Phil. Based-on: <20210413081008.3409459-1-f4bug@amsat.org> "exec: Remove accel/tcg/ from include paths" Philippe Mathieu-Daudé (26): target/mips: Simplify meson TCG rules target/mips: Move IEEE rounding mode array to new source file target/mips: Move msa_reset() to new source file target/mips: Make CPU/FPU regnames[] arrays global target/mips: Restrict mips_cpu_dump_state() to cpu.c target/mips: Extract load/store helpers to ldst_helper.c meson: Introduce meson_user_arch source set for arch-specific user-mode target/mips: Introduce tcg-internal.h for TCG specific declarations target/mips: Add simple user-mode mips_cpu_do_interrupt() target/mips: Add simple user-mode mips_cpu_tlb_fill() target/mips: Move cpu_signal_handler definition around target/mips: Move sysemu specific files under sysemu/ subfolder target/mips: Move code related to physical addressing to sysemu/phys.c target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder target/mips: Restrict mmu_init() to TCG target/mips: Move tlb_helper.c to tcg/sysemu/ target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope target/mips: Move Special opcodes to tcg/sysemu/special_helper.c target/mips: Move helper_cache() to tcg/sysemu/special_helper.c target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c target/mips: Move exception management code to exception.c target/mips: Move CP0 helpers to sysemu/cp0.c target/mips: Move helper.h -> tcg/helper.h.inc target/mips: Move TCG source files under tcg/ sub directory hw/mips: Restrict non-virtualized machines to TCG gitlab-ci: Add KVM mips64el cross-build jobs meson.build | 6 + target/mips/helper.h | 787 +----------- target/mips/internal.h | 97 +- target/mips/tcg/tcg-internal.h | 64 + target/mips/tcg/helper.h.inc | 613 +++++++++ target/mips/{ => tcg}/msa_helper.h.inc | 0 target/mips/tcg/sysemu_helper.h.inc | 184 +++ target/mips/{ => tcg}/mips32r6.decode | 0 target/mips/{ => tcg}/mips64r6.decode | 0 target/mips/{ => tcg}/msa32.decode | 0 target/mips/{ => tcg}/msa64.decode | 0 target/mips/{ => tcg}/tx79.decode | 0 target/mips/cpu.c | 307 ++--- target/mips/fpu.c | 25 + target/mips/msa.c | 60 + target/mips/op_helper.c | 1210 ------------------ target/mips/{ => sysemu}/addr.c | 0 target/mips/sysemu/cp0.c | 123 ++ target/mips/{ => sysemu}/cp0_timer.c | 0 target/mips/{ => sysemu}/machine.c | 0 target/mips/sysemu/physaddr.c | 257 ++++ target/mips/{ => tcg}/dsp_helper.c | 0 target/mips/tcg/exception.c | 169 +++ target/mips/{ => tcg}/fpu_helper.c | 8 - target/mips/tcg/ldst_helper.c | 304 +++++ target/mips/{ => tcg}/lmmi_helper.c | 0 target/mips/{ => tcg}/msa_helper.c | 36 - target/mips/{ => tcg}/msa_translate.c | 0 target/mips/{ => tcg}/mxu_translate.c | 0 target/mips/tcg/op_helper.c | 421 ++++++ target/mips/{ => tcg}/rel6_translate.c | 0 target/mips/{ => tcg/sysemu}/cp0_helper.c | 0 target/mips/{ => tcg/sysemu}/mips-semi.c | 0 target/mips/tcg/sysemu/special_helper.c | 183 +++ target/mips/{ => tcg/sysemu}/tlb_helper.c | 612 +++++---- target/mips/{ => tcg}/translate.c | 91 -- target/mips/{ => tcg}/translate_addr_const.c | 0 target/mips/{ => tcg}/tx79_translate.c | 0 target/mips/{ => tcg}/txx9_translate.c | 0 target/mips/tcg/user/helper.c | 64 + target/mips/tcg/user/stubs.c | 29 + .gitlab-ci.d/crossbuilds.yml | 8 + hw/mips/meson.build | 11 +- target/mips/meson.build | 55 +- target/mips/sysemu/meson.build | 7 + target/mips/tcg/meson.build | 35 + target/mips/tcg/sysemu/meson.build | 6 + target/mips/tcg/user/meson.build | 4 + 48 files changed, 3034 insertions(+), 2742 deletions(-) create mode 100644 target/mips/tcg/tcg-internal.h create mode 100644 target/mips/tcg/helper.h.inc rename target/mips/{ => tcg}/msa_helper.h.inc (100%) create mode 100644 target/mips/tcg/sysemu_helper.h.inc rename target/mips/{ => tcg}/mips32r6.decode (100%) rename target/mips/{ => tcg}/mips64r6.decode (100%) rename target/mips/{ => tcg}/msa32.decode (100%) rename target/mips/{ => tcg}/msa64.decode (100%) rename target/mips/{ => tcg}/tx79.decode (100%) create mode 100644 target/mips/fpu.c create mode 100644 target/mips/msa.c delete mode 100644 target/mips/op_helper.c rename target/mips/{ => sysemu}/addr.c (100%) create mode 100644 target/mips/sysemu/cp0.c rename target/mips/{ => sysemu}/cp0_timer.c (100%) rename target/mips/{ => sysemu}/machine.c (100%) create mode 100644 target/mips/sysemu/physaddr.c rename target/mips/{ => tcg}/dsp_helper.c (100%) create mode 100644 target/mips/tcg/exception.c rename target/mips/{ => tcg}/fpu_helper.c (99%) create mode 100644 target/mips/tcg/ldst_helper.c rename target/mips/{ => tcg}/lmmi_helper.c (100%) rename target/mips/{ => tcg}/msa_helper.c (99%) rename target/mips/{ => tcg}/msa_translate.c (100%) rename target/mips/{ => tcg}/mxu_translate.c (100%) create mode 100644 target/mips/tcg/op_helper.c rename target/mips/{ => tcg}/rel6_translate.c (100%) rename target/mips/{ => tcg/sysemu}/cp0_helper.c (100%) rename target/mips/{ => tcg/sysemu}/mips-semi.c (100%) create mode 100644 target/mips/tcg/sysemu/special_helper.c rename target/mips/{ => tcg/sysemu}/tlb_helper.c (76%) rename target/mips/{ => tcg}/translate.c (99%) rename target/mips/{ => tcg}/translate_addr_const.c (100%) rename target/mips/{ => tcg}/tx79_translate.c (100%) rename target/mips/{ => tcg}/txx9_translate.c (100%) create mode 100644 target/mips/tcg/user/helper.c create mode 100644 target/mips/tcg/user/stubs.c create mode 100644 target/mips/sysemu/meson.build create mode 100644 target/mips/tcg/meson.build create mode 100644 target/mips/tcg/sysemu/meson.build create mode 100644 target/mips/tcg/user/meson.build