Message ID | 20200516063746.18296-1-anup.patel@wdc.com |
---|---|
Headers | show |
Series | RISC-V multi-socket support | expand |
Patchew URL: https://patchew.org/QEMU/20200516063746.18296-1-anup.patel@wdc.com/ Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20200516063746.18296-1-anup.patel@wdc.com Subject: [PATCH 0/4] RISC-V multi-socket support Type: series === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 Switched to a new branch 'test' 9031755 hw/riscv: virt: Allow creating multiple sockets 67e9547 hw/riscv: Allow creating multiple instances of PLIC 2999a11 hw/riscv: spike: Allow creating multiple sockets b563a80 hw/riscv: Allow creating multiple instances of CLINT === OUTPUT BEGIN === 1/4 Checking commit b563a8089a7a (hw/riscv: Allow creating multiple instances of CLINT) 2/4 Checking commit 2999a1101f27 (hw/riscv: spike: Allow creating multiple sockets) ERROR: braces {} are necessary for all arms of this statement #202: FILE: hw/riscv/spike.c:194: + if ((smp_cpus / s->num_socs) < SPIKE_CPUS_PER_SOCKET_MIN) [...] ERROR: braces {} are necessary for all arms of this statement #206: FILE: hw/riscv/spike.c:198: + if (SPIKE_SOCKETS_MAX < s->num_socs) [...] ERROR: braces {} are necessary for all arms of this statement #212: FILE: hw/riscv/spike.c:204: + if (i == (s->num_socs - 1)) [...] + else [...] WARNING: line over 80 characters #248: FILE: hw/riscv/spike.c:299: + htif_mm_init(system_memory, mask_rom, &s->soc[0].harts[0].env, serial_hd(0)); WARNING: line over 80 characters #266: FILE: hw/riscv/spike.c:322: + object_initialize_child(OBJECT(machine), "soc", &s->soc[0], sizeof(s->soc[0]), WARNING: line over 80 characters #284: FILE: hw/riscv/spike.c:386: + htif_mm_init(system_memory, mask_rom, &s->soc[0].harts[0].env, serial_hd(0)); WARNING: line over 80 characters #302: FILE: hw/riscv/spike.c:414: + object_initialize_child(OBJECT(machine), "soc", &s->soc[0], sizeof(s->soc[0]), WARNING: line over 80 characters #329: FILE: hw/riscv/spike.c:497: + htif_mm_init(system_memory, mask_rom, &s->soc[0].harts[0].env, serial_hd(0)); total: 3 errors, 5 warnings, 322 lines checked Patch 2/4 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/4 Checking commit 67e95477fcbe (hw/riscv: Allow creating multiple instances of PLIC) 4/4 Checking commit 90317551d9da (hw/riscv: virt: Allow creating multiple sockets) ERROR: spaces required around that '*' (ctx:VxV) #32: FILE: hw/riscv/virt.c:63: + [VIRT_PLIC] = { 0xc000000, VIRT_PLIC_SIZE(VIRT_CPUS_MAX*2) }, ^ WARNING: line over 80 characters #295: FILE: hw/riscv/virt.c:343: + qemu_fdt_setprop_cell(fdt, name, "interrupt-parent", plic_virtio_phandle); ERROR: braces {} are necessary for all arms of this statement #478: FILE: hw/riscv/virt.c:497: + if ((smp_cpus / s->num_socs) < VIRT_CPUS_PER_SOCKET_MIN) [...] ERROR: braces {} are necessary for all arms of this statement #482: FILE: hw/riscv/virt.c:501: + if (VIRT_SOCKETS_MAX < s->num_socs) [...] ERROR: braces {} are necessary for all arms of this statement #497: FILE: hw/riscv/virt.c:508: + if (i == (s->num_socs - 1)) [...] + else [...] total: 4 errors, 1 warnings, 638 lines checked Patch 4/4 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20200516063746.18296-1-anup.patel@wdc.com/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
On Fri, May 15, 2020 at 11:40 PM Anup Patel <anup.patel@wdc.com> wrote: > > This series adds multi-socket support for RISC-V virt machine and > RISC-V spike machine. The multi-socket support will help us improve > various RISC-V operating systems, firmwares, and bootloader to > support RISC-V NUMA systems. > > These patch can be found in riscv_multi_socket_v1 branch at: > https://github.com/avpatel/qemu.git > > To try this patches, we will need: > 1. OpenSBI multi-PLIC and multi-CLINT support which can be found in > multi_plic_clint_v1 branch at: > https://github.com/avpatel/opensbi.git > 2. Linux multi-PLIC improvements support which can be found in > plic_imp_v1 branch at: > https://github.com/avpatel/linux.git > > Anup Patel (4): > hw/riscv: Allow creating multiple instances of CLINT > hw/riscv: spike: Allow creating multiple sockets > hw/riscv: Allow creating multiple instances of PLIC > hw/riscv: virt: Allow creating multiple sockets Can you make sure all the patches pass checkpatch? Alistair > > hw/riscv/sifive_clint.c | 20 +- > hw/riscv/sifive_e.c | 4 +- > hw/riscv/sifive_plic.c | 24 +- > hw/riscv/sifive_u.c | 4 +- > hw/riscv/spike.c | 210 ++++++++------ > hw/riscv/virt.c | 495 ++++++++++++++++++-------------- > include/hw/riscv/sifive_clint.h | 7 +- > include/hw/riscv/sifive_plic.h | 12 +- > include/hw/riscv/spike.h | 8 +- > include/hw/riscv/virt.h | 12 +- > 10 files changed, 458 insertions(+), 338 deletions(-) > > -- > 2.25.1 > >
> -----Original Message----- > From: Alistair Francis <alistair23@gmail.com> > Sent: 20 May 2020 02:50 > To: Anup Patel <Anup.Patel@wdc.com> > Cc: Peter Maydell <peter.maydell@linaro.org>; Palmer Dabbelt > <palmer@dabbelt.com>; Alistair Francis <Alistair.Francis@wdc.com>; Sagar > Karandikar <sagark@eecs.berkeley.edu>; Atish Patra <Atish.Patra@wdc.com>; > open list:RISC-V <qemu-riscv@nongnu.org>; qemu-devel@nongnu.org > Developers <qemu-devel@nongnu.org>; Anup Patel <anup@brainfault.org> > Subject: Re: [PATCH 0/4] RISC-V multi-socket support > > On Fri, May 15, 2020 at 11:40 PM Anup Patel <anup.patel@wdc.com> wrote: > > > > This series adds multi-socket support for RISC-V virt machine and > > RISC-V spike machine. The multi-socket support will help us improve > > various RISC-V operating systems, firmwares, and bootloader to support > > RISC-V NUMA systems. > > > > These patch can be found in riscv_multi_socket_v1 branch at: > > https://github.com/avpatel/qemu.git > > > > To try this patches, we will need: > > 1. OpenSBI multi-PLIC and multi-CLINT support which can be found in > > multi_plic_clint_v1 branch at: > > https://github.com/avpatel/opensbi.git > > 2. Linux multi-PLIC improvements support which can be found in > > plic_imp_v1 branch at: > > https://github.com/avpatel/linux.git > > > > Anup Patel (4): > > hw/riscv: Allow creating multiple instances of CLINT > > hw/riscv: spike: Allow creating multiple sockets > > hw/riscv: Allow creating multiple instances of PLIC > > hw/riscv: virt: Allow creating multiple sockets > > Can you make sure all the patches pass checkpatch? My bad, I forgot to run checkpatch on this series. I will update in v2. Regards, Anup