Message ID | 20200109024907.2730-1-richard.henderson@linaro.org |
---|---|
Headers | show |
Series | cputlb: Various cleanups | expand |
On Thu, Jan 9, 2020 at 12:49 PM Richard Henderson <richard.henderson@linaro.org> wrote: > > I had a conversation with Alistair Francis at KVM forum about > being able to represent ASIDs "properly". This lead to the idea > that target-specific code might be able to cache TLBs outside of > the "main" NB_MMU_MODES -- possibly thousands of them. > > This goes nowhere near that far. But it does begin edging toward > the possibility of having a > > struct CPUTLBSaved { > CPUTLBDesc d; > CPUTLBDescFast f; > }; > > by moving some of the most basic routines to use CPUTLBDesc and > CPUTLBDescFast directly instead of always using an mmu_idx. > > I'm not sure how much time I'll have to go further along these > lines, but what I have so far still looks like a cleanup. Thanks for helping with this! Unfortunately I haven't had a chance to dig into this myself. Alistair > > > r~ > > > Richard Henderson (9): > cputlb: Merge tlb_table_flush_by_mmuidx into > tlb_flush_one_mmuidx_locked > cputlb: Make tlb_n_entries private to cputlb.c > cputlb: Pass CPUTLBDescFast to tlb_n_entries and sizeof_tlb > cputlb: Hoist tlb portions in tlb_mmu_resize_locked > cputlb: Hoist tlb portions in tlb_flush_one_mmuidx_locked > cputlb: Split out tlb_mmu_flush_locked > cputlb: Partially merge tlb_dyn_init into tlb_init > cputlb: Initialize tlbs as flushed > cputlb: Hoist timestamp outside of loops over tlbs > > include/exec/cpu_ldst.h | 5 -- > accel/tcg/cputlb.c | 120 +++++++++++++++++++++------------------- > 2 files changed, 64 insertions(+), 61 deletions(-) > > -- > 2.20.1 > >