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[208.66.210.181]) by smtp.gmail.com with ESMTPSA id c7sm7548700ioc.63.2019.04.26.09.27.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 26 Apr 2019 09:27:02 -0700 (PDT) From: Stephen Checkoway To: QEMU Developers , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Kevin Wolf , Max Reitz , "open list:Block layer core" , Markus Armbruster , Laszlo Ersek , Laurent Vivier , Paolo Bonzini Date: Fri, 26 Apr 2019 12:26:14 -0400 Message-Id: <20190426162624.55977-1-stephen.checkoway@oberlin.edu> X-Mailer: git-send-email 2.20.1 (Apple Git-117) MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::141 Subject: [Qemu-devel] [PATCH v4 00/10] block/pflash_cfi02: Implement missing AMD pflash functionality X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephen Checkoway Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The goal of this patch series implement the following AMD command-set parallel flash functionality: - flash interleaving; - nonuniform sector sizes; - erase suspend/resume commands; and - multi-sector erase. During refactoring and implementation, I discovered several bugs that are fixed here as well: - flash commands use only 11-bits of the address in most cases, but the current code uses all of them [1]; - entering CFI mode from autoselect mode and then exiting CFI mode should return the chip to autoselect mode, but the current code returns to read array mode; and - reset command should be ignored during sector/chip erase, but the current code performs the reset. The first patch in the series adds a test for the existing behavior. Tests for additional behavior/bug fixes are added in the relevant patch. 1. I found firmware in the wild that relies on the 11-bit address behavior, probably due to a bug in the firmware itself. Changes from v1: - Fix missing spaces around *, -, and ?; - Fix missing Signed-off-by line on patch 7; and - Replace use of errc with g_printerr and exit. Changes from v2: - Remove global_qtest from tests; and - Test the CFI table changes. Changes from v3: - Replace err.h/err() with glib functions; and - Reformat qtest_initf lines. Stephen Checkoway (10): block/pflash_cfi02: Add test for supported commands block/pflash_cfi02: Refactor, NFC intended block/pflash_cfi02: Fix command address comparison block/pflash_cfi02: Implement intereleaved flash devices block/pflash_cfi02: Implement nonuniform sector sizes block/pflash_cfi02: Fix CFI in autoselect mode block/pflash_cfi02: Fix reset command not ignored during erase block/pflash_cfi02: Implement multi-sector erase block/pflash_cfi02: Implement erase suspend/resume block/pflash_cfi02: Use the chip erase time specified in the CFI table hw/block/pflash_cfi02.c | 843 +++++++++++++++++++++++++++----------- tests/Makefile.include | 2 + tests/pflash-cfi02-test.c | 812 ++++++++++++++++++++++++++++++++++++ 3 files changed, 1420 insertions(+), 237 deletions(-) create mode 100644 tests/pflash-cfi02-test.c