From patchwork Tue Oct 2 16:35:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 977966 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42PlDZ2Y6Fz9s7T for ; Wed, 3 Oct 2018 02:37:18 +1000 (AEST) Received: from localhost ([::1]:44715 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g7Nff-00071p-OS for incoming@patchwork.ozlabs.org; Tue, 02 Oct 2018 12:37:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34726) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g7NeZ-0006b0-EK for qemu-devel@nongnu.org; Tue, 02 Oct 2018 12:36:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g7NeY-00051w-C5 for qemu-devel@nongnu.org; Tue, 02 Oct 2018 12:36:07 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:51546) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g7NeT-0004yW-FA; Tue, 02 Oct 2018 12:36:01 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1g7NeR-0007GF-1S; Tue, 02 Oct 2018 17:35:59 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 2 Oct 2018 17:35:43 +0100 Message-Id: <20181002163556.10279-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.0 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 00/13] target/arm: Implement v8M stack limit checks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This patchset implements the v8M stack limit checking feature, which is the last missing piece of the v8M architectural support. Note that the stack limit triggers when the SP value is changed to something below the limit, not when a load or store is performed below the limit. It's also done only for certain instructions that update SP, not for every possible way to change SP. For loads and stores which do writeback to SP there are also some rules about what parts of the load/store are permitted to happen if the check triggers -- we keep things simple by taking the approach of doing the check first so that no accesses are done. We take a straightforward approach to implementing the checks: generating a call to a helper function which does the comparison and might raise an exception. This obviously imposes some overhead for the common case where the limit isn't being breached, but generating code for a compare-and-conditionally-call seemed too tricky to insert into the existing code... thanks -- PMM Peter Maydell (13): target/arm: Define new TBFLAG for v8M stack checking target/arm: Define new EXCP type for v8M stack overflows target/arm: Move v7m_using_psp() to internals.h target/arm: Add v8M stack checks on ADD/SUB/MOV of SP target/arm: Add some comments in Thumb decode target/arm: Add v8M stack checks on exception entry target/arm: Add v8M stack limit checks on NS function calls target/arm: Add v8M stack checks for LDRD/STRD (imm) target/arm: Add v8M stack checks for Thumb2 LDM/STM target/arm: Add v8M stack checks for T32 load/store single target/arm: Add v8M stack checks for Thumb push/pop target/arm: Add v8M stack checks for VLDM/VSTM target/arm: Add v8M stack checks for MSR to SP_NS target/arm/cpu.h | 9 ++ target/arm/helper.h | 2 + target/arm/internals.h | 38 ++++++++ target/arm/translate.h | 1 + target/arm/helper.c | 99 ++++++++++++++++----- target/arm/op_helper.c | 23 ++++- target/arm/translate.c | 198 +++++++++++++++++++++++++++++++++++++---- 7 files changed, 330 insertions(+), 40 deletions(-)