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Iglesias" , Peter Maydell , Andrey Smirnov , Sai Pavan Boddu , Clement Deschamps , Jean-Christophe Dubois , =?utf-8?q?Gr=C3=A9gory_Estrade?= , Igor Mitsyanko , Krzysztof Kozlowski , Andrew Baumann , Prasad J Pandit Date: Wed, 3 Jan 2018 15:33:53 -0300 Message-Id: <20180103183418.23730-1-f4bug@amsat.org> X-Mailer: git-send-email 2.15.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::242 Subject: [Qemu-devel] [PATCH v4 00/25] SDHCI: add qtests and fix few issues X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Stefan Hajnoczi Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Since v3: - no change, but split back in 2 series, 1st part is "SDHCI: housekeeping v5", Based-on: 20180103180805.18140-18-f4bug@amsat.org Since v2: - more detailed 'capabilities', all boards converted to use these properties - since all qtests pass, removed the previous 'capareg' property - added Stefan/Alistair R-b - corrected 'access' LED behavior (Alistair's review) - more uses of the registerfields API - remove some dead code - cosmetix: - added more comments - renamed a pair of registers - reordered few struct members Note, the bcm2835 seems to have 1KB minimum blocksize, however the current model is implemented with 512B. I didn't change the current value. Since v1: - addressed Alistair Francis review comments, added some R-b - only move register defines to "sd-internal.h" - fixed deposit64() arguments - dropped unuseful s->fifo_buffer = NULL - use a qemu_irq for the LED, restrict the logging to ON/OFF - fixed a trace format string error - included Andrey Smirnov ACMD12ERRSTS write patch - dropped few unuseful patches, and separate the Python polemical ones for later From the "SDHCI housekeeping" series: - 1: we restrict part of "sd/sd.h" into local "sd-internal.h", - 2,3: we somehow beautiful the code, no logical changes, - 4-7: we refactor the common sysbus/pci qdev code, - 8-10: we add plenty of trace events which will result useful later, - 11: we finally expose a "dma-memory" property. From the "SDHCI: add a qtest and fix few issues" series: - 12,13: fix registers - 14,15: boards can specify which SDHCI Spec to use (v2 and v3 so far) - 15-20: HCI qtest Regards, Phil. $ git backport-diff # with v2 [----] : patches are identical [####] : number of functional differences between upstream/downstream patch [down] : patch is downstream-only The flags [FC] indicate (F)unctional and (C)ontextual differences, respectively 001/25:[down] 'sdhci: add a spec_version property' 002/25:[down] 'sdhci: add basic Spec v1 capabilities' 003/25:[down] 'sdhci: add max-block-length capability (Spec v1)' 004/25:[down] 'sdhci: add clock capabilities (Spec v1)' 005/25:[down] 'sdhci: add DMA and 64-bit capabilities (Spec v2)' 006/25:[down] 'sdhci: default to Spec v2' 007/25:[down] 'sdhci: add a 'dma' shortcut property' 008/25:[down] 'sdhci: add BLOCK_SIZE_MASK for DMA' 009/25:[down] 'sdhci: Fix 64-bit ADMA2' 010/25:[down] 'hw/arm/exynos4210: implement SDHCI Spec v2' 011/25:[down] 'hw/arm/xilinx_zynq: implement SDHCI Spec v2' 012/25:[0022] [FC] 'sdhci: add qtest to check the SD Spec version' 013/25:[down] 'sdhci: check Spec v2 capabilities qtest' 014/25:[down] 'sdhci: add v3 capabilities' 015/25:[down] 'sdhci: rename the hostctl1 register' 016/25:[down] 'hw/arm/bcm2835_peripherals: implement SDHCI Spec v3' 017/25:[down] 'hw/arm/fsl-imx6: implement SDHCI Spec v3' 018/25:[down] 'hw/arm/xilinx_zynqmp: implement SDHCI Spec v3' 019/25:[down] 'sdhci: check Spec v3 capabilities qtest' 020/25:[down] 'sdhci: remove the deprecated 'capareg' property' 021/25:[0008] [FC] 'sdhci: add check_capab_readonly() qtest' 022/25:[0009] [FC] 'sdhci: add a check_capab_baseclock() qtest' 023/25:[0011] [FC] 'sdhci: add a check_capab_sdma() qtest' 024/25:[----] [-C] 'sdhci: add a check_capab_v3() qtest' 025/25:[down] 'sdhci: add Spec v4.2 register definitions' Philippe Mathieu-Daudé (24): sdhci: add a spec_version property sdhci: add basic Spec v1 capabilities sdhci: add max-block-length capability (Spec v1) sdhci: add clock capabilities (Spec v1) sdhci: add DMA and 64-bit capabilities (Spec v2) sdhci: default to Spec v2 sdhci: add a 'dma' shortcut property sdhci: add BLOCK_SIZE_MASK for DMA hw/arm/exynos4210: implement SDHCI Spec v2 hw/arm/xilinx_zynq: implement SDHCI Spec v2 sdhci: add qtest to check the SD Spec version sdhci: check Spec v2 capabilities qtest sdhci: add v3 capabilities sdhci: rename the hostctl1 register hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 hw/arm/fsl-imx6: implement SDHCI Spec v3 hw/arm/xilinx_zynqmp: implement SDHCI Spec v3 sdhci: check Spec v3 capabilities qtest sdhci: remove the deprecated 'capareg' property sdhci: add check_capab_readonly() qtest sdhci: add a check_capab_baseclock() qtest sdhci: add a check_capab_sdma() qtest sdhci: add a check_capab_v3() qtest sdhci: add Spec v4.2 register definitions Sai Pavan Boddu (1): sdhci: Fix 64-bit ADMA2 include/hw/sd/sdhci.h | 21 +++- hw/sd/sdhci-internal.h | 70 +++++++++++-- hw/arm/bcm2835_peripherals.c | 35 +++++-- hw/arm/exynos4210.c | 13 ++- hw/arm/fsl-imx6.c | 12 +++ hw/arm/xilinx_zynq.c | 64 +++++++----- hw/arm/xlnx-zynqmp.c | 38 +++++-- hw/sd/sdhci.c | 243 ++++++++++++++++++++++++++----------------- tests/sdhci-test.c | 177 +++++++++++++++++++++++++++++++ tests/Makefile.include | 3 + 10 files changed, 521 insertions(+), 155 deletions(-) create mode 100644 tests/sdhci-test.c