Message ID | 1561309489-16146-1-git-send-email-aleksandar.markovic@rt-rk.com |
---|---|
Headers | show |
Series | tcg/ppc: Add vector opcodes | expand |
Patchew URL: https://patchew.org/QEMU/1561309489-16146-1-git-send-email-aleksandar.markovic@rt-rk.com/ Hi, This series seems to have some coding style problems. See output below for more information: Subject: [Qemu-devel] [PATCH v5 00/16] tcg/ppc: Add vector opcodes Type: series Message-id: 1561309489-16146-1-git-send-email-aleksandar.markovic@rt-rk.com === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === From https://github.com/patchew-project/qemu * [new tag] patchew/1561309489-16146-1-git-send-email-aleksandar.markovic@rt-rk.com -> patchew/1561309489-16146-1-git-send-email-aleksandar.markovic@rt-rk.com Switched to a new branch 'test' 22d133b7d3 tcg/ppc: Update vector support to v3.00 90bbf51163 tcg/ppc: Update vector support to v2.07 b5335688c8 tcg/ppc: Update vector support to v2.06 b521901488 tcg/ppc: Support vector dup2 8924e68f97 tcg/ppc: Support vector multiply e293fff80b tcg/ppc: Support vector shift by immediate f690223722 tcg/ppc: Add empty file tcg-target.opc.h e4e6419f8c tcg/ppc: Prepare case for vector multiply 7957f8f41c tcg/ppc: Add support for vector saturated add/subtract fe805396ae tcg/ppc: Add support for vector add/subtract 5cb6cd0fc0 tcg/ppc: Add support for vector maximum/minimum 4747cecdb1 tcg/ppc: Add support for load/store/logic/comparison 421bc6d7d3 tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC() 0379705f8d tcg/ppc: Introduce macro VX4() 7fc4554647 tcg/ppc: Introduce flag have_isa_altivec 29c55ddd9f tcg/ppc: Introduce Altivec registers === OUTPUT BEGIN === 1/16 Checking commit 29c55ddd9f2e (tcg/ppc: Introduce Altivec registers) 2/16 Checking commit 7fc455464789 (tcg/ppc: Introduce flag have_isa_altivec) 3/16 Checking commit 0379705f8d31 (tcg/ppc: Introduce macro VX4()) ERROR: spaces required around that '|' (ctx:VxV) #21: FILE: tcg/ppc/tcg-target.inc.c:323: +#define VX4(opc) (OPCD(4)|(opc)) ^ total: 1 errors, 0 warnings, 7 lines checked Patch 3/16 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 4/16 Checking commit 421bc6d7d308 (tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC()) 5/16 Checking commit 4747cecdb1b0 (tcg/ppc: Add support for load/store/logic/comparison) 6/16 Checking commit 5cb6cd0fc043 (tcg/ppc: Add support for vector maximum/minimum) 7/16 Checking commit fe805396aee3 (tcg/ppc: Add support for vector add/subtract) 8/16 Checking commit 7957f8f41c63 (tcg/ppc: Add support for vector saturated add/subtract) 9/16 Checking commit e4e6419f8c88 (tcg/ppc: Prepare case for vector multiply) 10/16 Checking commit f69022372202 (tcg/ppc: Add empty file tcg-target.opc.h) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #14: new file mode 100644 WARNING: Block comments use a leading /* on a separate line #19: FILE: tcg/ppc/tcg-target.opc.h:1: +/* Target-specific opcodes for host vector expansion. These will be WARNING: Block comments use * on subsequent lines #20: FILE: tcg/ppc/tcg-target.opc.h:2: +/* Target-specific opcodes for host vector expansion. These will be + emitted by tcg_expand_vec_op. For those familiar with GCC internals, WARNING: Block comments use a trailing */ on a separate line #21: FILE: tcg/ppc/tcg-target.opc.h:3: + consider these to be UNSPEC with names. */ total: 0 errors, 4 warnings, 3 lines checked Patch 10/16 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 11/16 Checking commit e293fff80b39 (tcg/ppc: Support vector shift by immediate) 12/16 Checking commit 8924e68f97c6 (tcg/ppc: Support vector multiply) ERROR: code indent should never use tabs #133: FILE: tcg/ppc/tcg-target.inc.c:3219: +^Ibreak;$ total: 1 errors, 0 warnings, 185 lines checked Patch 12/16 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 13/16 Checking commit b52190148845 (tcg/ppc: Support vector dup2) 14/16 Checking commit b5335688c827 (tcg/ppc: Update vector support to v2.06) 15/16 Checking commit 90bbf5116349 (tcg/ppc: Update vector support to v2.07) 16/16 Checking commit 22d133b7d326 (tcg/ppc: Update vector support to v3.00) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/1561309489-16146-1-git-send-email-aleksandar.markovic@rt-rk.com/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com
From: Aleksandar Markovic <amarkovic@wavecomp.com> Changes since v4: * Patch 1, "tcg/ppc: Introduce Altivec registers", is divided into ten smaller patches. * The net result (code-wise) is not changed between former patch 1 and ten new patches. * Remaining (2-7) patches from v4 are applied verbatim. * This means that code-wise v5 and v4 do not differ. * v5 is devised to help debugging, and to better organize the code. Changes since v3: * Add support for bitsel, with the vsx xxsel insn. * Rely on the new relocation overflow handling, so we don't require 3 insns for a vector load. Changes since v2: * Several generic tcg patches to improve dup vs dupi vs dupm. In particular, if a global temp (like guest r10) is not in a host register, we should duplicate from memory instead of loading to an integer register, spilling to stack, loading to a vector register, and then duplicating. * I have more confidence that 32-bit ppc host should work this time around. No testing on that front yet, but I've unified some code sequences with 64-bit ppc host. * Base altivec now supports V128 only. Moved V64 support to Power7 (v2.06), which has 64-bit load/store. * Dropped support for 64-bit vector multiply using Power8. The expansion was too large compared to using integer regs. Richard Henderson (16): tcg/ppc: Introduce Altivec registers tcg/ppc: Introduce flag have_isa_altivec tcg/ppc: Introduce macro VX4() tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC() tcg/ppc: Add support for load/store/logic/comparison tcg/ppc: Add support for vector maximum/minimum tcg/ppc: Add support for vector add/subtract tcg/ppc: Add support for vector saturated add/subtract tcg/ppc: Prepare case for vector multiply tcg/ppc: Add empty file tcg-target.opc.h tcg/ppc: Support vector shift by immediate tcg/ppc: Support vector multiply tcg/ppc: Support vector dup2 tcg/ppc: Update vector support to v2.06 tcg/ppc: Update vector support to v2.07 tcg/ppc: Update vector support to v3.00 tcg/ppc/tcg-target.h | 39 +- tcg/ppc/tcg-target.inc.c | 1073 +++++++++++++++++++++++++++++++++++++++++++--- tcg/ppc/tcg-target.opc.h | 11 + 3 files changed, 1061 insertions(+), 62 deletions(-) create mode 100644 tcg/ppc/tcg-target.opc.h