From patchwork Mon Oct 8 14:56:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 980621 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rt-rk.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42TNm33Mdyz9sBq for ; Tue, 9 Oct 2018 01:58:43 +1100 (AEDT) Received: from localhost ([::1]:46724 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g9WzZ-00043R-4S for incoming@patchwork.ozlabs.org; Mon, 08 Oct 2018 10:58:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45621) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g9Wyy-00041b-SF for qemu-devel@nongnu.org; Mon, 08 Oct 2018 10:58:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g9Wyu-0005Bn-Ow for qemu-devel@nongnu.org; Mon, 08 Oct 2018 10:58:04 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:39967 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g9Wyu-0004P9-Fb for qemu-devel@nongnu.org; Mon, 08 Oct 2018 10:58:00 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id DF5D61A1E69; Mon, 8 Oct 2018 16:56:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.mipstec.com (unknown [82.117.201.26]) by mail.rt-rk.com (Postfix) with ESMTPSA id C10FE1A1D6A; Mon, 8 Oct 2018 16:56:57 +0200 (CEST) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 8 Oct 2018 16:56:24 +0200 Message-Id: <1539010596-30858-1-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v3 00/12] Misc MIPS fixes and improvements for October 2018 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Aleksandar Markovic This series contains support for MIPS ABI flags in elf.h, DSP R3 availability control, and emulation of nanoMIPS EVA instructions. MIPS ABI flags will be used in near future for linux user mode support for certain MIPS-specific parts of prctl() system call. This series also contains support for WatchHi, MemoryMapID, SAARI, and SAAR registers, ITU updates, implementation of DRAM, and I6500 core configuration. All patches were developed a while ago, but were not submitted to this list for various reasons. v2->v3: - added patch on extending WatchHi registers - added patch on MemoryMapID, SAARI, and SAAR registers - added patch on ITU updates wrt SAAR - added patch on Data Scratch Pad RAM - added patch on I6500 core configuration - corrected the patch on nanoMIPS EVA opcodes v1->v2: - added three patches on MIPS-specifics in elf.h Dimitrije Nikolic (2): target/mips: Add opcodes for nanoMIPS EVA instructions target/mips: Implement emulation of nanoMIPS EVA instructions Stefan Markovic (5): elf: Fix PT_MIPS_XXX constants elf: Add MIPS_ABI_FP_XXX constants elf: Add Mips_elf_abiflags_v0 structure target/mips: Add bit definitions for DSP R3 ASE target/mips: Add availability control for DSP R3 ASE Yongbok Kim (5): target/mips: Extend WatchHi registers target/mips: Implement MemoryMapID, SAARI, and SAAR registers hw/mips: Update ITU to utilise SAARI/SAAR registers hw/mips: Add Data Scratch Pad RAM target/mips: Add I6500 core configuration default-configs/mips-softmmu-common.mak | 1 + hw/mips/cps.c | 9 ++ hw/mips/mips_malta.c | 31 ++++ hw/misc/Makefile.objs | 1 + hw/misc/mips_itu.c | 72 +++++++++- include/elf.h | 30 +++- include/hw/mips/cps.h | 2 + include/hw/misc/mips_itu.h | 7 + target/mips/cpu.h | 21 ++- target/mips/helper.h | 9 ++ target/mips/internal.h | 14 +- target/mips/machine.c | 8 +- target/mips/mips-defs.h | 1 + target/mips/op_helper.c | 98 ++++++++++++- target/mips/translate.c | 241 +++++++++++++++++++++++++++++++- target/mips/translate_init.inc.c | 46 +++++- 16 files changed, 568 insertions(+), 23 deletions(-)