diff mbox series

[1/4] libpdbg: Separate p10 core driver

Message ID 20201110045217.137133-2-amitay@ozlabs.org
State Accepted
Headers show
Series Implement thread status for p10 | expand

Checks

Context Check Description
snowpatch_ozlabs/build-multiarch success Test build-multiarch on branch master
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (bdec2f8c512ff4a70eaadcb01a7494b4cb5e13e5)

Commit Message

Amitay Isaacs Nov. 10, 2020, 4:52 a.m. UTC
Signed-off-by: Amitay Isaacs <amitay@ozlabs.org>
---
 Makefile.am                |  1 +
 libpdbg/p10_fapi_targets.c | 38 --------------------
 libpdbg/p10chip.c          | 71 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 72 insertions(+), 38 deletions(-)
 create mode 100644 libpdbg/p10chip.c
diff mbox series

Patch

diff --git a/Makefile.am b/Makefile.am
index cf505fd..fc7e2f6 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -184,6 +184,7 @@  libpdbg_la_SOURCES = \
 	libpdbg/p9chip.c \
 	libpdbg/p9_fapi_targets.c \
 	libpdbg/p9_scom_addr.h \
+	libpdbg/p10chip.c \
 	libpdbg/p10_fapi_targets.c \
 	libpdbg/p10_scom_addr.h \
 	libpdbg/sbefifo.c \
diff --git a/libpdbg/p10_fapi_targets.c b/libpdbg/p10_fapi_targets.c
index 0779f50..6023389 100644
--- a/libpdbg/p10_fapi_targets.c
+++ b/libpdbg/p10_fapi_targets.c
@@ -43,43 +43,6 @@  static struct eq p10_eq = {
 };
 DECLARE_HW_UNIT(p10_eq);
 
-#define NUM_CORES_PER_EQ 4
-static uint64_t p10_core_translate(struct core *c, uint64_t addr)
-{
-	int region = 0;
-	int chip_unitnum = pdbg_target_index(t(c));
-
-	switch(chip_unitnum % NUM_CORES_PER_EQ) {
-	case 0:
-		region = 8;
-		break;
-	case 1:
-		region = 4;
-		break;
-	case 2:
-		region = 2;
-		break;
-	case 3:
-		region = 1;
-		break;
-	}
-	addr = set_chiplet_id(addr, EQ0_CHIPLET_ID + pdbg_target_index(t(c)) / 4);
-	addr &= 0xFFFFFFFFFFFF0FFFULL;
-	addr |= ((region & 0xF) << 12);
-
-	return addr;
-}
-
-static struct core p10_core = {
-	.target = {
-		.name = "POWER10 core",
-		.compatible = "ibm,power10-core",
-		.class = "core",
-		.translate = translate_cast(p10_core_translate),
-	},
-};
-DECLARE_HW_UNIT(p10_core);
-
 static uint64_t p10_pec_translate(struct pec *pec, uint64_t addr)
 {
 	int chip_unitnum = pdbg_target_index(t(pec));
@@ -564,7 +527,6 @@  __attribute__((constructor))
 static void register_p10_fapi_targets(void)
 {
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_eq_hw_unit);
-	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_core_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_pec_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_phb_hw_unit);
 	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_nmmu_hw_unit);
diff --git a/libpdbg/p10chip.c b/libpdbg/p10chip.c
new file mode 100644
index 0000000..7a3976a
--- /dev/null
+++ b/libpdbg/p10chip.c
@@ -0,0 +1,71 @@ 
+/* Copyright 2020 IBM Corp.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * 	http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ * implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include <stdio.h>
+#include <inttypes.h>
+
+#include "hwunit.h"
+#include "bitutils.h"
+#include "operations.h"
+#include "chip.h"
+#include "debug.h"
+
+#define NUM_CORES_PER_EQ 4
+#define EQ0_CHIPLET_ID 0x20
+
+static uint64_t p10_core_translate(struct core *c, uint64_t addr)
+{
+	int region = 0;
+	int chip_unitnum = pdbg_target_index(&c->target);
+	int chiplet_id = EQ0_CHIPLET_ID + chip_unitnum / NUM_CORES_PER_EQ;
+
+	switch(chip_unitnum % NUM_CORES_PER_EQ) {
+	case 0:
+		region = 8;
+		break;
+	case 1:
+		region = 4;
+		break;
+	case 2:
+		region = 2;
+		break;
+	case 3:
+		region = 1;
+		break;
+	}
+	addr &= 0xFFFFFFFFC0FFFFFFULL;
+	addr |= ((chiplet_id & 0x3F) << 24);
+
+	addr &= 0xFFFFFFFFFFFF0FFFULL;
+	addr |= ((region & 0xF) << 12);
+
+	return addr;
+}
+
+static struct core p10_core = {
+	.target = {
+		.name = "POWER10 Core",
+		.compatible = "ibm,power10-core",
+		.class = "core",
+		.translate = translate_cast(p10_core_translate),
+	},
+};
+DECLARE_HW_UNIT(p10_core);
+
+__attribute__((constructor))
+static void register_p10chip(void)
+{
+	pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_core_hw_unit);
+}