[v4,10/16] tests: Add path based selection tests

Message ID	20181116011431.246208-11-amitay@ozlabs.org
State	Accepted
Headers	show Return-Path: <pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org> From: Amitay Isaacs <amitay@ozlabs.org> To: pdbg@lists.ozlabs.org Date: Fri, 16 Nov 2018 12:14:25 +1100 Message-Id: <20181116011431.246208-11-amitay@ozlabs.org> In-Reply-To: <20181116011431.246208-1-amitay@ozlabs.org> References: <20181116011431.246208-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH v4 10/16] tests: Add path based selection tests Precedence: list Cc: Amitay Isaacs <amitay@ozlabs.org> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" <pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>
Series	Device tree path based targeting \| expand [v4,00/16] Device tree path based targeting [v4,01/16] libpdbg: Convert printf to DEBUG statements [v4,02/16] main: Convert target_selection() to return a boolean [v4,03/16] util: Move parse_list() into a separate file [v4,04/16] path: Add device tree path based targeting [v4,05/16] main: Add an option for path based targetting [v4,06/16] main: Add explicit probing of selected targets [v4,07/16] main: Convert -p/-c/-t/-a/-l to path based targets [v4,08/16] main: Switch to path based target selection [v4,09/16] main: Fix probe() to print targets correctly [v4,10/16] tests: Add path based selection tests [v4,11/16] main: Do not use argv[0] for progname [v4,12/16] main: Update probe output to display device names [v4,13/16] libpdbg: Add an api for address translation [v4,14/16] main: Convert getcfam/putcfam to use path based targeting [v4,15/16] main: Convert getscom/putscom to use path based targeting [v4,16/16] main: Convert register functions to path based targeting

Context	Check	Description
snowpatch_ozlabs/apply_patch	success	master/apply_patch Successfully applied
snowpatch_ozlabs/build-multiarch	success	Test build-multiarch on branch master

diff --git a/Makefile.am b/Makefile.am index 2a687ca..f1e06f6 100644 --- a/Makefile.am +++ b/Makefile.am @@ -13,6 +13,7 @@ check_PROGRAMS = $(libpdbg_tests) optcmd_test PDBG_TESTS = \ tests/test_selection.sh \ + tests/test_selection2.sh \ tests/test_hw_bmc.sh TESTS = $(libpdbg_tests) optcmd_test $(PDBG_TESTS) diff --git a/tests/test_selection2.sh b/tests/test_selection2.sh new file mode 100755 index 0000000..4e7921d --- /dev/null +++ b/tests/test_selection2.sh @@ -0,0 +1,545 @@ +#!/bin/sh + +. $(dirname "$0")/driver.sh + +test_group "path target selection tests" + +arch=$(arch 2>/dev/null) + +do_skip () +{ + if [ "$arch" != "x86_64" ] ; then + test_skip + fi +} + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread +p1: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread +p2: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread +p3: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread +p4: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread +p5: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread +p6: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread +p7: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P thread probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread + c1: Fake Core + t0: Fake Thread + t1: Fake Thread + c2: Fake Core + t0: Fake Thread + t1: Fake Thread + c3: Fake Core + t0: Fake Thread + t1: Fake Thread + +EOF + +do_skip +test_run pdbg -b fake -P pib0/thread probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread +p1: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread +p2: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread +p3: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread +p4: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread +p5: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread +p6: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread +p7: Fake PIB + c0: Fake Core + t0: Fake Thread + t1: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P core0/thread probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p1: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p2: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p3: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p4: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p5: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p6: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p7: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P thread0 probe + + +test_result 0 <<EOF +p0: Fake PIB + c2: Fake Core + t0: Fake Thread + t1: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P pib0/core2/thread probe + + +test_result 0 <<EOF +p0: Fake PIB + c2: Fake Core + t1: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P pib0/core2/thread1 probe + + +test_result 0 <<EOF +p1: Fake PIB + c0: Fake Core + t0: Fake Thread +p2: Fake PIB + c0: Fake Core + t0: Fake Thread +p3: Fake PIB + c0: Fake Core + t0: Fake Thread +p5: Fake PIB + c0: Fake Core + t0: Fake Thread +p6: Fake PIB + c0: Fake Core + t0: Fake Thread + +EOF + +do_skip +test_run pdbg -b fake -P pib[1-3,5,5-6]/core0/thread0 probe + + +test_result 0 <<EOF +p0: Fake PIB +EOF + +do_skip +test_run pdbg -b fake -P pib0 probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core +p1: Fake PIB + c0: Fake Core +p2: Fake PIB + c0: Fake Core +p3: Fake PIB + c0: Fake Core +p4: Fake PIB + c0: Fake Core +p5: Fake PIB + c0: Fake Core +p6: Fake PIB + c0: Fake Core +p7: Fake PIB + c0: Fake Core +EOF + +do_skip +test_run pdbg -b fake -P core0 probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p1: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p2: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p3: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p4: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p5: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p6: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p7: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P thread0 probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core + t0: Fake Thread +p1: Fake PIB + c0: Fake Core + t0: Fake Thread +p2: Fake PIB + c0: Fake Core + t0: Fake Thread +p3: Fake PIB + c0: Fake Core + t0: Fake Thread +p4: Fake PIB + c0: Fake Core + t0: Fake Thread +p5: Fake PIB + c0: Fake Core + t0: Fake Thread +p6: Fake PIB + c0: Fake Core + t0: Fake Thread +p7: Fake PIB + c0: Fake Core + t0: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P core0/thread0 probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core + t0: Fake Thread + c1: Fake Core + t0: Fake Thread + c2: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P pib0/thread0 probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core +EOF + +do_skip +test_run pdbg -b fake -P pib0/core0 probe + + +test_result 0 <<EOF +p0: Fake PIB + c0: Fake Core + t0: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P pib0/core0/thread0 probe + + +test_result 0 <<EOF +p1: Fake PIB + c1: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p3: Fake PIB + c1: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p5: Fake PIB + c1: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +p7: Fake PIB + c1: Fake Core + t0: Fake Thread + c3: Fake Core + t0: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P pib[1,3,5,7,9]/core[1,3,5]/thread[0,2] probe + + +test_result 0 <<EOF +p1: Fake PIB + c1: Fake Core + t1: Fake Thread + c3: Fake Core + t1: Fake Thread +p3: Fake PIB + c1: Fake Core + t1: Fake Thread + c3: Fake Core + t1: Fake Thread +p5: Fake PIB + c1: Fake Core + t1: Fake Thread + c3: Fake Core + t1: Fake Thread +p7: Fake PIB + c1: Fake Core + t1: Fake Thread + c3: Fake Core + t1: Fake Thread +EOF + +do_skip +test_run pdbg -b fake -P pib[1,3]/core[1,3,5]/thread1 -P pib[5,7-9]/core[1,3,5]/thread1 probe + +test_result 1 <<EOF +No valid targets found or specified. Try adding -p/-c/-t options to specify a target. +Alternatively run 'pdbg -a probe' to get a list of all valid targets +EOF + +do_skip +test_run pdbg -b fake -P "fsi0/pib%d" probe

[v4,10/16] tests: Add path based selection tests

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