| Message ID | 158918386448.9312.3322456335675173855.stgit@jupiter |
|---|---|
| State | New |
| Headers | show |
| Series | pdbg: Fix the core numbering. | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch master (6c10b68bf774a9fe21affd5ef0b40084cd49800d) |
| snowpatch_ozlabs/build-multiarch | success | Test build-multiarch on branch master |
| snowpatch_ozlabs/github-build | success | Successfully ran 1 jobs. |
| snowpatch_ozlabs/github-test | fail | pdbg failed at step Test pdbg. |
On Mon, 2020-05-11 at 13:27 +0530, Mahesh Salgaonkar wrote: > The core number in the path string for all the targets is always > shown as > "core0". This creates a confusion whether the scom read/write has > selected > correct core target or not. This patch fixes the core numbering. Also > remove leading 0s in the numbering to keep m4 happy. The device tree naming uses local number scheme, rather than global scheme. If there are multiple targets under same parent, then they will be named differently (e.g. thread@0, thread@1). However core targets are under separate chiplets, that's why they have the same name (i.e. core@0). The index for core has the correct "global" value as far as the system is concerned. Instead of renumbering the core nodes with inconsistent numbering, it might be helpful to update the output prefix to print core id as well when operating on a core. For example: p0:c2: 0x0000000022010a40 = 0x0000000000000000 Amitay. > > Without this patch: > > root@witherspoon-Y111UF7CB09T:/tmp# ./pdbg -p0 -c2 getscom > 0x20010A40 > p0: 0x0000000020010a40 failed (/proc0/pib) > p0: 0x0000000022010a40 = 0x0000000000000000 ( > /proc0/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@0) > > After the patch: > > root@witherspoon-Y111UF7CB09T:/tmp# ./pdbg -p0 -c2 getscom > 0x20010A40 > p0: 0x0000000020010a40 failed (/proc0/pib) > p0: 0x0000000022010a40 = 0x0000000000000000 ( > /proc0/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@2) > > Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> > --- > p9.dts.m4 | 34 +++++++++++++++++----------------- > 1 file changed, 17 insertions(+), 17 deletions(-) > > diff --git a/p9.dts.m4 b/p9.dts.m4 > index 6cdfba4..bf1b9d7 100644 > --- a/p9.dts.m4 > +++ b/p9.dts.m4 > @@ -18,7 +18,7 @@ dnl CORE([index]) > dnl > define(`CORE', > ` > - core@0 { > + core@$1 { > #address-cells = <0x01>; > #size-cells = <0x00>; > reg = <0x00 0x00 0xfffff>; > @@ -376,21 +376,21 @@ define(`CHIP', > EQ_(0) > EX_(0,0) > CHIPLET_(20) > - CORE(00) > + CORE(0) > }; > > CHIPLET_(21) > - CORE(01) > + CORE(1) > }; > }; > > EX_(0,1) > CHIPLET_(22) > - CORE(02) > + CORE(2) > }; > > CHIPLET_(23) > - CORE(03) > + CORE(3) > }; > }; > }; > @@ -400,21 +400,21 @@ define(`CHIP', > EQ_(1) > EX_(1,0) > CHIPLET_(24) > - CORE(04) > + CORE(4) > }; > > CHIPLET_(25) > - CORE(05) > + CORE(5) > }; > }; > > EX_(1,1) > CHIPLET_(26) > - CORE(06) > + CORE(6) > }; > > CHIPLET_(27) > - CORE(07) > + CORE(7) > }; > }; > }; > @@ -424,21 +424,21 @@ define(`CHIP', > EQ_(2) > EX_(2,0) > CHIPLET_(28) > - CORE(08) > + CORE(8) > }; > > CHIPLET_(29) > - CORE(09) > + CORE(9) > }; > }; > > EX_(2,1) > CHIPLET_(2a) > - CORE(0a) > + CORE(a) > }; > > CHIPLET_(2b) > - CORE(0b) > + CORE(b) > }; > }; > }; > @@ -448,21 +448,21 @@ define(`CHIP', > EQ_(3) > EX_(3,0) > CHIPLET_(2c) > - CORE(0c) > + CORE(c) > }; > > CHIPLET_(2d) > - CORE(0d) > + CORE(d) > }; > }; > > EX_(3,1) > CHIPLET_(2e) > - CORE(0e) > + CORE(e) > }; > > CHIPLET_(2f) > - CORE(0f) > + CORE(f) > }; > }; > }; > Amitay.
diff --git a/p9.dts.m4 b/p9.dts.m4 index 6cdfba4..bf1b9d7 100644 --- a/p9.dts.m4 +++ b/p9.dts.m4 @@ -18,7 +18,7 @@ dnl CORE([index]) dnl define(`CORE', ` - core@0 { + core@$1 { #address-cells = <0x01>; #size-cells = <0x00>; reg = <0x00 0x00 0xfffff>; @@ -376,21 +376,21 @@ define(`CHIP', EQ_(0) EX_(0,0) CHIPLET_(20) - CORE(00) + CORE(0) }; CHIPLET_(21) - CORE(01) + CORE(1) }; }; EX_(0,1) CHIPLET_(22) - CORE(02) + CORE(2) }; CHIPLET_(23) - CORE(03) + CORE(3) }; }; }; @@ -400,21 +400,21 @@ define(`CHIP', EQ_(1) EX_(1,0) CHIPLET_(24) - CORE(04) + CORE(4) }; CHIPLET_(25) - CORE(05) + CORE(5) }; }; EX_(1,1) CHIPLET_(26) - CORE(06) + CORE(6) }; CHIPLET_(27) - CORE(07) + CORE(7) }; }; }; @@ -424,21 +424,21 @@ define(`CHIP', EQ_(2) EX_(2,0) CHIPLET_(28) - CORE(08) + CORE(8) }; CHIPLET_(29) - CORE(09) + CORE(9) }; }; EX_(2,1) CHIPLET_(2a) - CORE(0a) + CORE(a) }; CHIPLET_(2b) - CORE(0b) + CORE(b) }; }; }; @@ -448,21 +448,21 @@ define(`CHIP', EQ_(3) EX_(3,0) CHIPLET_(2c) - CORE(0c) + CORE(c) }; CHIPLET_(2d) - CORE(0d) + CORE(d) }; }; EX_(3,1) CHIPLET_(2e) - CORE(0e) + CORE(e) }; CHIPLET_(2f) - CORE(0f) + CORE(f) }; }; };
The core number in the path string for all the targets is always shown as "core0". This creates a confusion whether the scom read/write has selected correct core target or not. This patch fixes the core numbering. Also remove leading 0s in the numbering to keep m4 happy. Without this patch: root@witherspoon-Y111UF7CB09T:/tmp# ./pdbg -p0 -c2 getscom 0x20010A40 p0: 0x0000000020010a40 failed (/proc0/pib) p0: 0x0000000022010a40 = 0x0000000000000000 (/proc0/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@0) After the patch: root@witherspoon-Y111UF7CB09T:/tmp# ./pdbg -p0 -c2 getscom 0x20010A40 p0: 0x0000000020010a40 failed (/proc0/pib) p0: 0x0000000022010a40 = 0x0000000000000000 (/proc0/pib/chiplet@10000000/eq@0/ex@1/chiplet@22000000/core@2) Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> --- p9.dts.m4 | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-)