From patchwork Thu Oct 29 08:14:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Berezin X-Patchwork-Id: 537718 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5320E140787 for ; Thu, 29 Oct 2015 19:15:12 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=VgPRJDPj; dkim-atps=neutral Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 0CB482807F4; Thu, 29 Oct 2015 09:13:16 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-0.1 required=5.0 tests=BAYES_00,FREEMAIL_FROM, HTML_IMAGE_ONLY_12, HTML_MESSAGE, T_DKIM_INVALID autolearn=no version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id AB27A2804A9 for ; Thu, 29 Oct 2015 09:13:12 +0100 (CET) X-policyd-weight: using cached result; rate: -8.5 Received: from mail-wi0-f181.google.com (mail-wi0-f181.google.com [209.85.212.181]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Thu, 29 Oct 2015 09:13:12 +0100 (CET) Received: by wijp11 with SMTP id p11so278926732wij.0 for ; Thu, 29 Oct 2015 01:14:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:date:message-id:subject:from:to:content-type; bh=i4M1SvX/7+/XWw9XLoJdHOpkIQLLcexZeOPLiUR5PpE=; b=VgPRJDPjd2iOoCjl10YJGGgeIWyO0oyxl05PquHEysA7rgNwWtU9PcGtaKaHhEBYmK 5nbWTRRkHZ3YZ4FzNYBIzSUwPm8POcSK2hnn4wf7lmQ6iNu1sfgcDgo2dmC1TjyfGhMf BeUjpMDGsBPpCEstBGYvCe5f4fhDA93us4QlCYfm0Vo0IQtvdk7/OwPvsBh8tt2lGfxm FbwdguIYeGtleydok2JmpSPk3F6xKhjmmFBh7v8sZT+32r/UbxmPc9idp+ZVV7mvZ9EP O8wzC48xWCJX+eclyTlQiXnY2T1kPXts1iaWhkjFog/MMstHw1HDfI+83OKGVBnklpdo UWuA== MIME-Version: 1.0 X-Received: by 10.194.22.234 with SMTP id h10mr562003wjf.72.1446106495708; Thu, 29 Oct 2015 01:14:55 -0700 (PDT) Received: by 10.28.52.141 with HTTP; Thu, 29 Oct 2015 01:14:55 -0700 (PDT) Date: Thu, 29 Oct 2015 11:14:55 +0300 Message-ID: From: Kirill Berezin To: openwrt-devel@lists.openwrt.org Subject: [OpenWrt-Devel] [RCF] A patch for mt7621 nand controller. X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" Hello. It seems that a code for a nand controller was added but not tested. This patch add a lost constant required for successful compilation and a bit of code that allocates and frees buffers needed by internal structures and a description for two more nand chips. By the way I found, that a nand controller in some way interferes with spi flash and sd. If I initialize a nand before spi flash or sd then nand controller becomes busy or returns ecc errors on every read. If I initialize, say load as module, it after spi flash or sd then everything works. I can't say what happens with sd or spi flash because my board have neither of it. May be I have an incorrect dts file. Kirill --- a/drivers/mtd/nand/mtk_nand.c 2015-10-22 12:42:37.783545248 +0400 +++ b/drivers/mtd/nand/mtk_nand.c 2015-10-22 12:32:47.000000000 +0400 @@ -110,6 +110,10 @@ int manu_id; int dev_id; +/* this constant was taken from linux/nand/nand.h v 3.14 + * in later versions it seems it was removed in order to save a bit of space + */ +#define NAND_MAX_OOBSIZE 774 static u8 local_oob_buf[NAND_MAX_OOBSIZE]; static u8 nand_badblock_offset = 0; @@ -2175,6 +2184,25 @@ nand_chip->pagemask = (nand_chip->chipsize >> nand_chip->page_shift) - 1; nand_chip->phys_erase_shift = ffs(mtd->erasesize) - 1; nand_chip->chip_shift = ffs(nand_chip->chipsize) - 1;//0x1C;//ffs(nand_chip->chipsize) - 1; + + /* this was taken from nand_base.c ##3876 nand_scan_tail */ + if (!(nand_chip->options & NAND_OWN_BUFFERS)) { + struct nand_buffers *nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize + mtd->oobsize * 3, GFP_KERNEL); + if (!nbuf) { + return -ENOMEM; + } + nbuf->ecccalc = (uint8_t *)(nbuf + 1); + nbuf->ecccode = nbuf->ecccalc + mtd->oobsize; + nbuf->databuf = nbuf->ecccode + mtd->oobsize; + + nand_chip->buffers = nbuf; + } else { + if (!nand_chip->buffers) { + printk(KERN_NOTICE "mtk_nand_probe: buffer space for nand_chip was not allocated.\n"); + return -ENOMEM; + } + } + nand_chip->oob_poi = nand_chip->buffers->databuf + mtd->writesize; nand_chip->badblockpos = 0; @@ -2251,6 +2279,9 @@ MSG(INIT, "[NFI] mtk_nand_probe fail, err = %d!\n", err); nand_release(mtd); platform_set_drvdata(pdev, NULL); + if ( NULL != nand_chip->buffers) { + kfree(nand_chip->buffers); + } kfree(host); nand_disable_clock(); return err; @@ -2261,8 +2292,12 @@ { struct mtk_nand_host *host = platform_get_drvdata(pdev); struct mtd_info *mtd = &host->mtd; + struct nand_chip *nand_chip = &host->nand_chip; nand_release(mtd); + if ( NULL != nand_chip->buffers) { + kfree(nand_chip->buffers); + } kfree(host); nand_disable_clock(); --- a/drivers/mtd/nand/nand_device_list.h 2015-10-22 12:42:37.784545248 +0400 +++ b/drivers/mtd/nand/nand_device_list.h 2015-10-22 09:40:33.000000000 +0400 @@ -43,6 +43,8 @@ {0xADBC, 0x905554, 5, 16, 512, 128, 2048, 64, 0x10801011, "H9DA4GH4JJAMC", 0}, {0x01F1, 0x801D01, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "S34ML01G100TF", 0}, {0x92F1, 0x8095FF, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "F59L1G81A", 0}, + {0xC8DA, 0x909544, 5, 8, 256, 128, 2048, 64, 0x30C77fff, "F59L2G81A", 0}, + {0xC8DC, 0x909554, 5, 8, 512, 128, 2048, 64, 0x30C77fff, "F59L4G81A", 0}, {0xECD3, 0x519558, 5, 8, 1024, 128, 2048, 64, 0x44333, "K9K8G8000", 0}, {0xC2F1, 0x801DC2, 4, 8, 128, 128, 2048, 64, 0x30C77fff, "MX30LF1G08AA", 0}, {0x98D3, 0x902676, 5, 8, 1024, 256, 4096, 224, 0x00C25332, "TC58NVG3S0F", 0},