From patchwork Wed Oct 28 17:22:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Petre X-Patchwork-Id: 537494 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7D85C141351 for ; Thu, 29 Oct 2015 04:23:31 +1100 (AEDT) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id DCD9128BD2F; Wed, 28 Oct 2015 18:21:21 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00 autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 38DE128BD2F for ; Wed, 28 Oct 2015 18:21:08 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 CL_IP_EQ_HELO_IP=-2 (check from: .posteo. - helo: .mout01.posteo. - helo-domain: .posteo.) FROM/MX_MATCHES_HELO(DOMAIN)=-2; rate: -8.5 Received: from mout01.posteo.de (mout01.posteo.de [185.67.36.65]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Wed, 28 Oct 2015 18:21:07 +0100 (CET) Received: from dovecot03.posteo.de (dovecot03.posteo.de [172.16.0.13]) by mout01.posteo.de (Postfix) with ESMTPS id 27AAA208C9 for ; Wed, 28 Oct 2015 18:22:50 +0100 (CET) Received: from mail.posteo.de (localhost [127.0.0.1]) by dovecot03.posteo.de (Postfix) with ESMTPSA id 3nmGtx5jtsz5vML for ; Wed, 28 Oct 2015 18:22:49 +0100 (CET) References: <20151026090134.CA35728BD6E@arrakis.dune.hu> To: OpenWrt Devel From: Daniel Petre X-Forwarded-Message-Id: <20151026090134.CA35728BD6E@arrakis.dune.hu> Message-ID: <56310468.4060108@posteo.net> Date: Wed, 28 Oct 2015 19:22:48 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <20151026090134.CA35728BD6E@arrakis.dune.hu> Subject: [OpenWrt-Devel] Fwd: [OpenWrt-Commits] r47262 - trunk/target/linux/ar71xx/patches-4.1 X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" Uhm, is there any chance for the wr841n v10 full support by Mr. Matthias Schiffer to be back ported to Chaos Calmer? After all it is not a "new device" but a subversion of an existing supported equipment.. Thanks! -------- Forwarded Message -------- Subject: [OpenWrt-Commits] r47262 - trunk/target/linux/ar71xx/patches-4.1 Date: Mon, 26 Oct 2015 10:01:34 +0100 From: openwrt-commits@openwrt.org Reply-To: OpenWrt SVN Commits To: openwrt-commits@lists.openwrt.org Author: blogic Date: 2015-10-26 10:01:34 +0100 (Mon, 26 Oct 2015) New Revision: 47262 Modified: trunk/target/linux/ar71xx/patches-4.1/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch trunk/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch Log: ar71xx: fix ath79_soc_rev value for QCA9531 ver. 2 ath9k expects to get revision id 2 for the QCA9531 ver. 2 rev. 0. This fixes the very low TX power on some devices like the TP-LINK TL-WR841ND v10. As ath79_soc_rev is only used to get the revision number to ath9k on the QCA9533, just set it to the expected value on the ver. 2. Signed-off-by: Matthias Schiffer Tested-by: Felix Kaechele Modified: trunk/target/linux/ar71xx/patches-4.1/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch =================================================================== --- trunk/target/linux/ar71xx/patches-4.1/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch 2015-10-26 09:01:28 UTC (rev 47261) +++ trunk/target/linux/ar71xx/patches-4.1/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch 2015-10-26 09:01:34 UTC (rev 47262) @@ -413,12 +413,13 @@ id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID); major = id & REV_ID_MAJOR_MASK; -@@ -152,6 +153,16 @@ static void __init ath79_detect_sys_type +@@ -152,6 +153,17 @@ static void __init ath79_detect_sys_type rev = id & AR934X_REV_ID_REVISION_MASK; break; + case REV_ID_MAJOR_QCA9533_V2: + ver = 2; ++ ath79_soc_rev = 2; + /* drop through */ + + case REV_ID_MAJOR_QCA9533: @@ -430,15 +431,23 @@ case REV_ID_MAJOR_QCA9556: ath79_soc = ATH79_SOC_QCA9556; chip = "9556"; -@@ -170,7 +181,7 @@ static void __init ath79_detect_sys_type +@@ -168,11 +180,12 @@ static void __init ath79_detect_sys_type + panic("ath79: unknown SoC, id:0x%08x", id); + } - ath79_soc_rev = rev; +- ath79_soc_rev = rev; ++ if (ver == 1) ++ ath79_soc_rev = rev; - if (soc_is_qca955x()) +- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", +- chip, rev); + if (soc_is_qca953x() || soc_is_qca955x()) - sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", - chip, rev); ++ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", ++ chip, ver, rev); else + sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); + pr_info("SoC: %s\n", ath79_sys_type); --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -105,6 +105,21 @@ Modified: trunk/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch =================================================================== --- trunk/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch 2015-10-26 09:01:28 UTC (rev 47261) +++ trunk/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch 2015-10-26 09:01:34 UTC (rev 47262) @@ -452,7 +452,7 @@ return -ENODEV; --- a/arch/mips/ath79/setup.c +++ b/arch/mips/ath79/setup.c -@@ -175,14 +175,29 @@ static void __init ath79_detect_sys_type +@@ -176,6 +176,18 @@ static void __init ath79_detect_sys_type rev = id & QCA955X_REV_ID_REVISION_MASK; break; @@ -471,19 +471,20 @@ default: panic("ath79: unknown SoC, id:0x%08x", id); } +@@ -183,9 +195,12 @@ static void __init ath79_detect_sys_type + if (ver == 1) + ath79_soc_rev = rev; - ath79_soc_rev = rev; - - if (soc_is_qca953x() || soc_is_qca955x()) -- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", + if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca9561()) -+ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", -+ chip, ver, rev); + sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", + chip, ver, rev); + else if (soc_is_tp9343()) + sprintf(ath79_sys_type, "Qualcomm Atheros TP%s rev %u", - chip, rev); ++ chip, rev); else sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); + pr_info("SoC: %s\n", ath79_sys_type); --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -143,6 +143,23 @@