From patchwork Tue Apr 28 20:10:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiner Kallweit X-Patchwork-Id: 465755 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.1 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4320B14007F for ; Wed, 29 Apr 2015 06:11:24 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=KE50hx5E; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 3164628AE12; Tue, 28 Apr 2015 22:10:11 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, T_DKIM_INVALID autolearn=no version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 866F328ACF0 for ; Tue, 28 Apr 2015 22:10:07 +0200 (CEST) X-policyd-weight: using cached result; rate: -8.5 Received: from mail-wg0-f54.google.com (mail-wg0-f54.google.com [74.125.82.54]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Tue, 28 Apr 2015 22:10:07 +0200 (CEST) Received: by wgso17 with SMTP id o17so6550755wgs.1 for ; Tue, 28 Apr 2015 13:11:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=IQ92i5hQGTPuWLI7X37uJYmB/lan3pL6AEefoWHOqPE=; b=KE50hx5E2L8gYp7T/3e0R46jAdq0/xnEYL0Yftgt+SqDueMZdMyny1Amv6o/2/791L 3/dWEX5k4wt7zDko51S4MPUOA7CQnZurQxst3GsPC1I4BQsFcFJj77zzytDeVPJhMYw3 Ip/H5t7IZ2bZKDz7UycejLKoAqgcMj6IXBjyzeel1DZOiTw9NWAeEt7tCuajwkL4Zdmc b8bwN93TvZWIOGOUe8AHhAZEYG59lSU4JMDi1l1A40gfDSjy6CMHg/izJZ1ZaPbLNBNp eKscsVdrzywQNHxm6QTLZRvUMztcuTp3LLzt/7oZnnxt0pAyoekrhoJ741mJ5pxzk26x wzDQ== X-Received: by 10.194.237.34 with SMTP id uz2mr34825328wjc.157.1430251870592; Tue, 28 Apr 2015 13:11:10 -0700 (PDT) Received: from ?IPv6:2003:62:5f15:1700:e057:615b:79db:54f5? (p200300625F151700E057615B79DB54F5.dip0.t-ipconnect.de. [2003:62:5f15:1700:e057:615b:79db:54f5]) by mx.google.com with ESMTPSA id gs7sm17982755wib.10.2015.04.28.13.11.09 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Apr 2015 13:11:09 -0700 (PDT) Message-ID: <553FE953.6090707@gmail.com> Date: Tue, 28 Apr 2015 22:10:59 +0200 From: Heiner Kallweit User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Christian Mehlis References: <553639D5.6090508@m3hlis.de> <553683AB.2030708@m3hlis.de> <5537D3D5.3070104@gmail.com> <5538E8E0.2030702@m3hlis.de> <553A85CD.7000003@gmail.com> <553E297E.10509@m3hlis.de> <553E5A0E.9000409@m3hlis.de> <553E8654.6000103@gmail.com> <553F79E1.2030904@m3hlis.de> <553FD37A.502@gmail.com> In-Reply-To: <553FD37A.502@gmail.com> Cc: OpenWrt Development List Subject: Re: [OpenWrt-Devel] AR8334 switch support X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" Am 28.04.2015 um 20:37 schrieb Heiner Kallweit: > Am 28.04.2015 um 14:15 schrieb Christian Mehlis: >> Am 27.04.2015 um 20:56 schrieb Heiner Kallweit: >>> The only other difference I found is the initial setting of LED_CTRL3 register. >>> Could you please test the following patch (first remove the initial patch attempt)? >> >> [ 0.850000] switch0: Atheros AR833X rev. 2 switch registered on ag71xx-mdio.0 >> [ 0.860000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: led_val = 3f >> [ 0.860000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: Detected AR8337 >> >> It seems that we have no luck here... >> In case you have any new idea I'll test the patch. >> >> Here is a picture of the switch chip: >> http://c33.imgup.net/2015-04-166a5b.jpg >> >> Best >> Christian >> . >> > I found a datasheet for QCA8334 and according to it these bits in LED_CTRl3 are supposed to > be 0 for this chip. But this doesn't seem to be true .. > Meanwhile I'm running out of ideas how to tell between the two chips. > > However I have another hypothesis: > The drivers sets bit MAC06_EXCHANGE_EN for AR8337. According to the datasheet this means > "Exchange MAC0 and MAC6". My assumption is that MAC6 is used as CPU port if this bit is set. > Having said this whether to set this bit or not might not be chip-specific but board-specific > (CPU connected to MAC0 vs. MAC6 pins of the switch chip). > AR8334 has no MAC6 (R)GMII pins therefore this bit must not be set. > Not sure how many supported devices actually use an AR8337. Maybe they share some > reference design and use MAC6 in general? > Conclusion would be that the driver can not know whether to set the bit or not. It would > have to be defined in platform configuration or device tree. > > I'm not an expert and refactored few parts of the driver only. > Therefore I can not promise any quick results, however I'll have a look at it. > > Rgds, Heiner > It was easier than I thought, here comes the related patch. Known limitations: 1. The patch supports configuration of this bit for platform-data-configured platforms only. DT-based platforms would need a similar extension. 2. For now it's for WPJ344 only. Every other AR8334-based device would need the same extension to the platform data. Rgds, Heiner Tested-By: Christian Mehlis --- target/linux/ar71xx/files/arch/mips/ath79/mach-wpj344.c | 1 + target/linux/generic/files/drivers/net/phy/ar8327.c | 5 ++++- target/linux/generic/files/include/linux/ar8216_platform.h | 4 +++- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj344.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj344.c index fd718bd..590778e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj344.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj344.c @@ -98,6 +98,7 @@ static struct ar8327_pad_cfg wpj344_ar8327_pad0_cfg = { .rxclk_delay_en = true, .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, + .mac06_exchange_en = -1, }; static struct ar8327_led_cfg wpj344_ar8327_led_cfg = { diff --git a/target/linux/generic/files/drivers/net/phy/ar8327.c b/target/linux/generic/files/drivers/net/phy/ar8327.c index 07e837e..772d03f 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8327.c +++ b/target/linux/generic/files/drivers/net/phy/ar8327.c @@ -124,6 +124,9 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg) break; } + if (cfg->mac06_exchange_en == 1) + t |= AR8337_PAD_MAC06_EXCHANGE_EN; + return t; } @@ -508,7 +511,7 @@ ar8327_hw_config_pdata(struct ar8xxx_priv *priv, data->port6_status = ar8327_get_port_init_status(&pdata->port6_cfg); t = ar8327_get_pad_cfg(pdata->pad0_cfg); - if (chip_is_ar8337(priv)) + if (chip_is_ar8337(priv) && pdata->pad0_cfg->mac06_exchange_en == 0) t |= AR8337_PAD_MAC06_EXCHANGE_EN; ar8xxx_write(priv, AR8327_REG_PAD0_MODE, t); diff --git a/target/linux/generic/files/include/linux/ar8216_platform.h b/target/linux/generic/files/include/linux/ar8216_platform.h index 4935ad3..821ff27 100644 --- a/target/linux/generic/files/include/linux/ar8216_platform.h +++ b/target/linux/generic/files/include/linux/ar8216_platform.h @@ -47,6 +47,8 @@ struct ar8327_pad_cfg { bool sgmii_delay_en; enum ar8327_clk_delay_sel txclk_delay_sel; enum ar8327_clk_delay_sel rxclk_delay_sel; + /* 0 = use driver default -1 = disable 1 = enable */ + int mac06_exchange_en; }; enum ar8327_port_speed { @@ -128,4 +130,4 @@ struct ar8327_platform_data { const struct ar8327_led_info *leds; }; -#endif /* AR8216_PLATFORM_H */ \ No newline at end of file +#endif /* AR8216_PLATFORM_H */