From patchwork Wed Feb 2 10:25:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Duwe X-Patchwork-Id: 1693492 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.openwrt.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=CTbyOmdR; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MwJ6N6wN9z23kt for ; Sun, 23 Oct 2022 23:53:32 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Cc:To:Subject:Date :From:References:In-Reply-To:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dLW+Z4iiE+0dUJu1/6N8Kg9QzTEdmoXjPO0S1fwPHi8=; b=CTbyOmdR+L29jX +eJ4aJk4h8KxbbHUhosBnGIJfR6NS/LIBTX/WdS8548zOb853urjlWYCTDuX9zie1wwTV9tgds5Nc uMC6h8WX+cacUY/5hw1hgGTj9SMiVFnmx4jsY/nOYaUJ9uDx3pTWV6xZJn984x1rixdvLdhbDCE5o yrVkGSxBTRyeiNdkkeAaGHdZSToJcqSoIRFaSLdSnHOcMZdVyKFfi1xL9kbO2W20LWhQzO6XuKX/B ZxbdQUAp4NXgTmtLLBRWQpOOxQUWWJZmyMFHJ53/EkuOPsR+2PoPxLfVrSKDQJ6ofqUklyWk5LWjl uKjcHd2JCod8tNhIh5nA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1omaSA-00FCiB-IQ; Sun, 23 Oct 2022 12:51:46 +0000 Received: from verein.lst.de ([213.95.11.211]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1omaRy-00FCe5-MT for openwrt-devel@lists.openwrt.org; Sun, 23 Oct 2022 12:51:36 +0000 Received: by verein.lst.de (Postfix, from userid 2005) id 1C62568BFE; Sun, 23 Oct 2022 14:51:32 +0200 (CEST) In-Reply-To: <20221023124738.8862E67373@verein.lst.de> References: <20221023124738.8862E67373@verein.lst.de> From: Torsten Duwe Date: Wed, 2 Feb 2022 11:25:43 +0100 Subject: [PATCH v2 2/7] lantiq: add common device tree template for x490 Fritzboxes To: openwrt-devel@lists.openwrt.org Cc: "Daniel Kestrel" Message-Id: <20221023125132.1C62568BFE@verein.lst.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221023_055135_054550_1E7BB9FB X-CRM114-Status: GOOD ( 10.14 ) X-Spam-Score: 2.1 (++) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: These devices (based on xrx200/VR9) replace the internal dwc2 USB2 with an external renesas USB3 controller, attached via PCIe. The whole wireless hardware is offloaded to a secondary SoC with an ethernet connection from the built-in switch. Content analysis details: (2.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record 2.1 DATE_IN_PAST_96_XX Date: is 96 hours or more before Received: date X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org These devices (based on xrx200/VR9) replace the internal dwc2 USB2 with an external renesas USB3 controller, attached via PCIe. The whole wireless hardware is offloaded to a secondary SoC with an ethernet connection from the built-in switch. This DTS describes the GSWIP in DSA mode, and defaults to UBI for the major part of the NAND flash. Signed-off-by: Torsten Duwe --- .../boot/dts/lantiq/vr9_avm_fritzx490.dtsi | 240 ++++++++++++++++++ 1 file changed, 240 insertions(+) create mode 100644 target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritzx490.dtsi diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritzx490.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritzx490.dtsi new file mode 100644 index 0000000000..057bcf6b93 --- /dev/null +++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritzx490.dtsi @@ -0,0 +1,240 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "avm,fritzx490", "lantiq,xway", "lantiq,vr9"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x10000000>; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <100>; + + wps { + // boxes with (unsupported) telephony HW have DECT here + label = "wps"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wifi { + label = "wifi"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-export { + compatible = "gpio-export"; + + gpio_wasp_reset { + gpio-export,name = "wasp:reset"; + gpio-export,output = <1>; + gpios = <&gpio 34 GPIO_ACTIVE_HIGH>; + }; + + gpio_wasp_wakeup { + gpio-export,name = "wasp:wakeup"; + gpio-export,output = <1>; + gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +ð0 { + mtd-mac-address = <&urlader 0xcc>; + mtd-mac-address-increment = <1>; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + gpio-ranges = <&gpio 0 0 56>; + + state_default: pinmux { + phy-rst { + lantiq,pins = "io32", "io44"; + lantiq,pull = <0>; + lantiq,open-drain; + lantiq,output = <1>; + }; + + pcie-rst { + lantiq,pins = "io21"; + lantiq,open-drain; + lantiq,output = <1>; + }; + }; + + pcie-rst-dev { + gpio-hog; + line-name = "pcie-rst-dev"; + gpios = <22 GPIO_ACTIVE_LOW>; + output-low; + }; + + usb-vbus { + gpio-hog; + line-name = "usb-vbus"; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&gswip { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; +}; + +&gswip_mdio { + phy0: ethernet-phy@0 { + reg = <0x00>; + reset-gpios = <&gpio 32 GPIO_ACTIVE_LOW>; + }; + + phy1: ethernet-phy@1 { + reg = <0x01>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + + phy11: ethernet-phy@11 { + reg = <0x11>; + }; + + phy13: ethernet-phy@13 { + reg = <0x13>; + }; +}; + +&gswip_ports { + port@0 { + reg = <0>; + label = "lan3"; + phy-mode = "rgmii-rxid"; + phy-handle = <&phy0>; + }; + + port@1 { + reg = <1>; + label = "lan4"; + phy-mode = "rgmii-rxid"; + phy-handle = <&phy1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&phy11>; + }; + + port@4 { + reg = <4>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&phy13>; + }; + + // internal port to wasp/owl WIFI system + port@5 { + reg = <5>; + label = "lan5"; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; +}; + +&localbus { + flash1: flash@1 { + compatible = "lantiq,nand-xway"; + bank-width = <2>; + reg = <0x1 0x0 0x2000000>; + + nand-ecc-engine = <&flash1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x400000>; + }; + + partition@400000 { + label = "ubi"; + reg = <0x400000 0x1fc00000>; + }; + }; + }; +}; + + +&pci0 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + + gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>; + lantiq,switch-pcie-endianess; +}; + +&spi { + status = "okay"; + + flash@4 { + compatible = "jedec,spi-nor"; + reg = <4>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + urlader: partition@0 { + reg = <0x0 0x40000>; + label = "urlader"; + read-only; + }; + + partition@40000 { + reg = <0x40000 0x60000>; + label = "tffs (1)"; + read-only; + }; + + partition@a0000 { + reg = <0xa0000 0x60000>; + label = "tffs (2)"; + read-only; + }; + }; + }; +};