| Message ID | 20180819104806.5876-1-gch981213@gmail.com |
|---|---|
| State | Changes Requested |
| Delegated to: | John Crispin |
| Headers | show |
| Series | [OpenWrt-Devel,v2] ath79: ag71xx: apply interface mode to MII0/1_CTRL on ar71xx/ar913x | expand |
On 19/08/18 12:48, Chuanhong Guo wrote: > We currently don't have any code configuring interface mode in ath79, > meaning that we relies on bootloader to set the correct interface mode. > > This patch added code to set interface correctly so that everything works > even if bootloader configures it wrong.(e.g. on WNDR3800 u-boot set > the second GMAC mode to RMII but it should be RGMII.) > > Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Hi, sorry I am late for the party and am aware that you've sent more than one version of this patch. please make the binding look as follows inside the ethX {} node add a property qca,mac-idx = <0 or 1>; and derive the mii register from that. This is how we solved the problem updtream for the MTK binding. John > --- > > Resend to add commit message. > > target/linux/ath79/dts/ar7100.dtsi | 4 +- > target/linux/ath79/dts/ar9132.dtsi | 2 +- > .../net/ethernet/atheros/ag71xx/ag71xx_main.c | 102 +++++++++++++++--- > 3 files changed, 92 insertions(+), 16 deletions(-) > > diff --git a/target/linux/ath79/dts/ar7100.dtsi b/target/linux/ath79/dts/ar7100.dtsi > index 8994a7d688..bb3c10bdc5 100644 > --- a/target/linux/ath79/dts/ar7100.dtsi > +++ b/target/linux/ath79/dts/ar7100.dtsi > @@ -171,7 +171,7 @@ > }; > > ð0 { > - compatible = "qca,ar7100-eth"; > + compatible = "qca,ar7100-mii0-eth"; > reg = <0x19000000 0x200 > 0x18070000 0x4>; > > @@ -189,7 +189,7 @@ > }; > > ð1 { > - compatible = "qca,ar7100-eth"; > + compatible = "qca,ar7100-mii1-eth"; > reg = <0x1a000000 0x200 > 0x18070004 0x4>; > > diff --git a/target/linux/ath79/dts/ar9132.dtsi b/target/linux/ath79/dts/ar9132.dtsi > index 9d8ddcf9ba..bf5e9c06fa 100644 > --- a/target/linux/ath79/dts/ar9132.dtsi > +++ b/target/linux/ath79/dts/ar9132.dtsi > @@ -185,7 +185,7 @@ > }; > > ð0 { > - compatible = "qca,ar9130-eth", "syscon"; > + compatible = "qca,ar9130-mii0-eth", "syscon"; > reg = <0x19000000 0x200 > 0x18070000 0x4>; > pll-data = <0x1a000000 0x13000a44 0x00441099>; > diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c > index 1e0bb6937f..72c6673037 100644 > --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c > +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c > @@ -529,6 +529,60 @@ static void ath79_set_pll(struct ag71xx *ag) > udelay(100); > } > > +static void ath79_mii_ctrl_set_if(struct ag71xx *ag, unsigned int mii_if) > +{ > + u32 t; > + > + t = __raw_readl(ag->mii_base); > + t &= ~(AR71XX_MII_CTRL_IF_MASK); > + t |= (mii_if & AR71XX_MII_CTRL_IF_MASK); > + __raw_writel(t, ag->mii_base); > +} > + > +static void ath79_mii0_ctrl_set_if(struct ag71xx *ag) > +{ > + unsigned int mii_if; > + > + switch (ag->phy_if_mode) { > + case PHY_INTERFACE_MODE_MII: > + mii_if = AR71XX_MII0_CTRL_IF_MII; > + break; > + case PHY_INTERFACE_MODE_GMII: > + mii_if = AR71XX_MII0_CTRL_IF_GMII; > + break; > + case PHY_INTERFACE_MODE_RGMII: > + mii_if = AR71XX_MII0_CTRL_IF_RGMII; > + break; > + case PHY_INTERFACE_MODE_RMII: > + mii_if = AR71XX_MII0_CTRL_IF_RMII; > + break; > + default: > + WARN(1, "Impossible PHY mode defined.\n"); > + return; > + } > + > + ath79_mii_ctrl_set_if(ag, mii_if); > +} > + > +static void ath79_mii1_ctrl_set_if(struct ag71xx *ag) > +{ > + unsigned int mii_if; > + > + switch (ag->phy_if_mode) { > + case PHY_INTERFACE_MODE_RMII: > + mii_if = AR71XX_MII1_CTRL_IF_RMII; > + break; > + case PHY_INTERFACE_MODE_RGMII: > + mii_if = AR71XX_MII1_CTRL_IF_RGMII; > + break; > + default: > + WARN(1, "Impossible PHY mode defined.\n"); > + return; > + } > + > + ath79_mii_ctrl_set_if(ag, mii_if); > +} > + > static void ath79_mii_ctrl_set_speed(struct ag71xx *ag) > { > unsigned int mii_speed; > @@ -573,8 +627,10 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update) > return; > } > > - if (!of_device_is_compatible(np, "qca,ar9130-eth") && > - !of_device_is_compatible(np, "qca,ar7100-eth")) > + if (!of_device_is_compatible(np, "qca,ar9130-mii0-eth") && > + !of_device_is_compatible(np, "qca,ar9132-mii1-eth") && > + !of_device_is_compatible(np, "qca,ar7100-mii0-eth") && > + !of_device_is_compatible(np, "qca,ar7100-mii1-eth")) > ag71xx_fast_reset(ag); > > cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); > @@ -612,8 +668,10 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update) > ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]); > > if (update) { > - if (of_device_is_compatible(np, "qca,ar7100-eth") || > - of_device_is_compatible(np, "qca,ar9130-eth")) { > + if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || > + of_device_is_compatible(np, "qca,ar7100-mii1-eth") || > + of_device_is_compatible(np, "qca,ar9130-mii0-eth") || > + of_device_is_compatible(np, "qca,ar9132-mii1-eth")) { > ath79_set_pll(ag); > ath79_mii_ctrl_set_speed(ag); > } else if (of_device_is_compatible(np, "qca,ar7242-eth") || > @@ -1307,8 +1365,10 @@ static int ag71xx_probe(struct platform_device *pdev) > } > > if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) { > - if (of_device_is_compatible(np, "qca,ar9130-eth") || > - of_device_is_compatible(np, "qca,ar7100-eth")) { > + if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || > + of_device_is_compatible(np, "qca,ar7100-mii1-eth") || > + of_device_is_compatible(np, "qca,ar9130-mii0-eth") || > + of_device_is_compatible(np, "qca,ar9132-mii1-eth")) { > ag->fifodata[0] = 0x0fff0000; > ag->fifodata[1] = 0x00001fff; > } else { > @@ -1316,9 +1376,11 @@ static int ag71xx_probe(struct platform_device *pdev) > ag->fifodata[1] = 0x015500aa; > ag->fifodata[2] = 0x01f00140; > } > - if (of_device_is_compatible(np, "qca,ar9130-eth")) > + if (of_device_is_compatible(np, "qca,ar9130-mii0-eth") || > + of_device_is_compatible(np, "qca,ar9132-mii1-eth")) > ag->fifodata[2] = 0x00780fff; > - else if (of_device_is_compatible(np, "qca,ar7100-eth")) > + else if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || > + of_device_is_compatible(np, "qca,ar7100-mii1-eth")) > ag->fifodata[2] = 0x008001ff; > } > > @@ -1392,11 +1454,14 @@ static int ag71xx_probe(struct platform_device *pdev) > ag->tx_hang_workaround = 1; > > ag->rx_buf_offset = NET_SKB_PAD; > - if (!of_device_is_compatible(np, "qca,ar7100-eth") && > - !of_device_is_compatible(np, "qca,ar9130-eth")) > + if (!of_device_is_compatible(np, "qca,ar9130-mii0-eth") && > + !of_device_is_compatible(np, "qca,ar9132-mii1-eth") && > + !of_device_is_compatible(np, "qca,ar7100-mii0-eth") && > + !of_device_is_compatible(np, "qca,ar7100-mii1-eth")) > ag->rx_buf_offset += NET_IP_ALIGN; > > - if (of_device_is_compatible(np, "qca,ar7100-eth")) { > + if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || > + of_device_is_compatible(np, "qca,ar7100-mii1-eth")) { > ag->tx_ring.desc_split = AG71XX_TX_RING_SPLIT; > tx_size *= AG71XX_TX_RING_DS_PER_PKT; > } > @@ -1427,6 +1492,15 @@ static int ag71xx_probe(struct platform_device *pdev) > goto err_free; > } > > + if (ag->mii_base) { > + if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || > + of_device_is_compatible(np, "qca,ar9130-mii0-eth")) > + ath79_mii0_ctrl_set_if(ag); > + else if (of_device_is_compatible(np, "qca,ar7100-mii1-eth") || > + of_device_is_compatible(np, "qca,ar9132-mii1-eth")) > + ath79_mii1_ctrl_set_if(ag); > + } > + > netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); > > ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, 0); > @@ -1490,11 +1564,13 @@ static int ag71xx_remove(struct platform_device *pdev) > } > > static const struct of_device_id ag71xx_match[] = { > - { .compatible = "qca,ar7100-eth" }, > + { .compatible = "qca,ar7100-mii0-eth" }, > + { .compatible = "qca,ar7100-mii1-eth" }, > { .compatible = "qca,ar7240-eth" }, > { .compatible = "qca,ar7241-eth" }, > { .compatible = "qca,ar7242-eth" }, > - { .compatible = "qca,ar9130-eth" }, > + { .compatible = "qca,ar9130-mii0-eth" }, > + { .compatible = "qca,ar9132-mii1-eth" }, > { .compatible = "qca,ar9330-eth" }, > { .compatible = "qca,ar9340-eth" }, > { .compatible = "qca,qca9530-eth" },
diff --git a/target/linux/ath79/dts/ar7100.dtsi b/target/linux/ath79/dts/ar7100.dtsi index 8994a7d688..bb3c10bdc5 100644 --- a/target/linux/ath79/dts/ar7100.dtsi +++ b/target/linux/ath79/dts/ar7100.dtsi @@ -171,7 +171,7 @@ }; ð0 { - compatible = "qca,ar7100-eth"; + compatible = "qca,ar7100-mii0-eth"; reg = <0x19000000 0x200 0x18070000 0x4>; @@ -189,7 +189,7 @@ }; ð1 { - compatible = "qca,ar7100-eth"; + compatible = "qca,ar7100-mii1-eth"; reg = <0x1a000000 0x200 0x18070004 0x4>; diff --git a/target/linux/ath79/dts/ar9132.dtsi b/target/linux/ath79/dts/ar9132.dtsi index 9d8ddcf9ba..bf5e9c06fa 100644 --- a/target/linux/ath79/dts/ar9132.dtsi +++ b/target/linux/ath79/dts/ar9132.dtsi @@ -185,7 +185,7 @@ }; ð0 { - compatible = "qca,ar9130-eth", "syscon"; + compatible = "qca,ar9130-mii0-eth", "syscon"; reg = <0x19000000 0x200 0x18070000 0x4>; pll-data = <0x1a000000 0x13000a44 0x00441099>; diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 1e0bb6937f..72c6673037 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -529,6 +529,60 @@ static void ath79_set_pll(struct ag71xx *ag) udelay(100); } +static void ath79_mii_ctrl_set_if(struct ag71xx *ag, unsigned int mii_if) +{ + u32 t; + + t = __raw_readl(ag->mii_base); + t &= ~(AR71XX_MII_CTRL_IF_MASK); + t |= (mii_if & AR71XX_MII_CTRL_IF_MASK); + __raw_writel(t, ag->mii_base); +} + +static void ath79_mii0_ctrl_set_if(struct ag71xx *ag) +{ + unsigned int mii_if; + + switch (ag->phy_if_mode) { + case PHY_INTERFACE_MODE_MII: + mii_if = AR71XX_MII0_CTRL_IF_MII; + break; + case PHY_INTERFACE_MODE_GMII: + mii_if = AR71XX_MII0_CTRL_IF_GMII; + break; + case PHY_INTERFACE_MODE_RGMII: + mii_if = AR71XX_MII0_CTRL_IF_RGMII; + break; + case PHY_INTERFACE_MODE_RMII: + mii_if = AR71XX_MII0_CTRL_IF_RMII; + break; + default: + WARN(1, "Impossible PHY mode defined.\n"); + return; + } + + ath79_mii_ctrl_set_if(ag, mii_if); +} + +static void ath79_mii1_ctrl_set_if(struct ag71xx *ag) +{ + unsigned int mii_if; + + switch (ag->phy_if_mode) { + case PHY_INTERFACE_MODE_RMII: + mii_if = AR71XX_MII1_CTRL_IF_RMII; + break; + case PHY_INTERFACE_MODE_RGMII: + mii_if = AR71XX_MII1_CTRL_IF_RGMII; + break; + default: + WARN(1, "Impossible PHY mode defined.\n"); + return; + } + + ath79_mii_ctrl_set_if(ag, mii_if); +} + static void ath79_mii_ctrl_set_speed(struct ag71xx *ag) { unsigned int mii_speed; @@ -573,8 +627,10 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update) return; } - if (!of_device_is_compatible(np, "qca,ar9130-eth") && - !of_device_is_compatible(np, "qca,ar7100-eth")) + if (!of_device_is_compatible(np, "qca,ar9130-mii0-eth") && + !of_device_is_compatible(np, "qca,ar9132-mii1-eth") && + !of_device_is_compatible(np, "qca,ar7100-mii0-eth") && + !of_device_is_compatible(np, "qca,ar7100-mii1-eth")) ag71xx_fast_reset(ag); cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); @@ -612,8 +668,10 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update) ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]); if (update) { - if (of_device_is_compatible(np, "qca,ar7100-eth") || - of_device_is_compatible(np, "qca,ar9130-eth")) { + if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || + of_device_is_compatible(np, "qca,ar7100-mii1-eth") || + of_device_is_compatible(np, "qca,ar9130-mii0-eth") || + of_device_is_compatible(np, "qca,ar9132-mii1-eth")) { ath79_set_pll(ag); ath79_mii_ctrl_set_speed(ag); } else if (of_device_is_compatible(np, "qca,ar7242-eth") || @@ -1307,8 +1365,10 @@ static int ag71xx_probe(struct platform_device *pdev) } if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) { - if (of_device_is_compatible(np, "qca,ar9130-eth") || - of_device_is_compatible(np, "qca,ar7100-eth")) { + if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || + of_device_is_compatible(np, "qca,ar7100-mii1-eth") || + of_device_is_compatible(np, "qca,ar9130-mii0-eth") || + of_device_is_compatible(np, "qca,ar9132-mii1-eth")) { ag->fifodata[0] = 0x0fff0000; ag->fifodata[1] = 0x00001fff; } else { @@ -1316,9 +1376,11 @@ static int ag71xx_probe(struct platform_device *pdev) ag->fifodata[1] = 0x015500aa; ag->fifodata[2] = 0x01f00140; } - if (of_device_is_compatible(np, "qca,ar9130-eth")) + if (of_device_is_compatible(np, "qca,ar9130-mii0-eth") || + of_device_is_compatible(np, "qca,ar9132-mii1-eth")) ag->fifodata[2] = 0x00780fff; - else if (of_device_is_compatible(np, "qca,ar7100-eth")) + else if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || + of_device_is_compatible(np, "qca,ar7100-mii1-eth")) ag->fifodata[2] = 0x008001ff; } @@ -1392,11 +1454,14 @@ static int ag71xx_probe(struct platform_device *pdev) ag->tx_hang_workaround = 1; ag->rx_buf_offset = NET_SKB_PAD; - if (!of_device_is_compatible(np, "qca,ar7100-eth") && - !of_device_is_compatible(np, "qca,ar9130-eth")) + if (!of_device_is_compatible(np, "qca,ar9130-mii0-eth") && + !of_device_is_compatible(np, "qca,ar9132-mii1-eth") && + !of_device_is_compatible(np, "qca,ar7100-mii0-eth") && + !of_device_is_compatible(np, "qca,ar7100-mii1-eth")) ag->rx_buf_offset += NET_IP_ALIGN; - if (of_device_is_compatible(np, "qca,ar7100-eth")) { + if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || + of_device_is_compatible(np, "qca,ar7100-mii1-eth")) { ag->tx_ring.desc_split = AG71XX_TX_RING_SPLIT; tx_size *= AG71XX_TX_RING_DS_PER_PKT; } @@ -1427,6 +1492,15 @@ static int ag71xx_probe(struct platform_device *pdev) goto err_free; } + if (ag->mii_base) { + if (of_device_is_compatible(np, "qca,ar7100-mii0-eth") || + of_device_is_compatible(np, "qca,ar9130-mii0-eth")) + ath79_mii0_ctrl_set_if(ag); + else if (of_device_is_compatible(np, "qca,ar7100-mii1-eth") || + of_device_is_compatible(np, "qca,ar9132-mii1-eth")) + ath79_mii1_ctrl_set_if(ag); + } + netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, 0); @@ -1490,11 +1564,13 @@ static int ag71xx_remove(struct platform_device *pdev) } static const struct of_device_id ag71xx_match[] = { - { .compatible = "qca,ar7100-eth" }, + { .compatible = "qca,ar7100-mii0-eth" }, + { .compatible = "qca,ar7100-mii1-eth" }, { .compatible = "qca,ar7240-eth" }, { .compatible = "qca,ar7241-eth" }, { .compatible = "qca,ar7242-eth" }, - { .compatible = "qca,ar9130-eth" }, + { .compatible = "qca,ar9130-mii0-eth" }, + { .compatible = "qca,ar9132-mii1-eth" }, { .compatible = "qca,ar9330-eth" }, { .compatible = "qca,ar9340-eth" }, { .compatible = "qca,qca9530-eth" },
We currently don't have any code configuring interface mode in ath79, meaning that we relies on bootloader to set the correct interface mode. This patch added code to set interface correctly so that everything works even if bootloader configures it wrong.(e.g. on WNDR3800 u-boot set the second GMAC mode to RMII but it should be RGMII.) Signed-off-by: Chuanhong Guo <gch981213@gmail.com> --- Resend to add commit message. target/linux/ath79/dts/ar7100.dtsi | 4 +- target/linux/ath79/dts/ar9132.dtsi | 2 +- .../net/ethernet/atheros/ag71xx/ag71xx_main.c | 102 +++++++++++++++--- 3 files changed, 92 insertions(+), 16 deletions(-)