diff mbox series

[OpenWrt-Devel,v2] ramips: mt7621: Fix some cosmetic DTC warnings

Message ID 20180607212138.28475-1-rosenp@gmail.com
State Accepted
Delegated to: John Crispin
Headers show
Series [OpenWrt-Devel,v2] ramips: mt7621: Fix some cosmetic DTC warnings | expand

Commit Message

Rosen Penev June 7, 2018, 9:21 p.m. UTC
Node /cpus/cpu@0 has a unit name, but no reg property
Node /cpus/cpu@1 has a unit name, but no reg property
Node /cpuintc@0 has a unit name, but no reg property
Node /cpuclock@0 has a unit name, but no reg property
Node /sysclock@0 has a unit name, but no reg property
Node /pcie@1e140000/pcie0 missing ranges for PCI bridge (or not a bridge)
Node /pcie@1e140000/pcie0 missing bus-range for PCI bridge
Node /pcie@1e140000/pcie1 missing ranges for PCI bridge (or not a bridge)
Node /pcie@1e140000/pcie1 missing bus-range for PCI bridge
Node /pcie@1e140000/pcie2 missing ranges for PCI bridge (or not a bridge)
Node /pcie@1e140000/pcie2 missing bus-range for PCI bridge

Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
 target/linux/ramips/dts/mt7621.dtsi | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)
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Patch

diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index e035dc736a..8dd76059e7 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -6,16 +6,23 @@ 
 	compatible = "mediatek,mt7621-soc";
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu@0 {
+			device_type = "cpu";
 			compatible = "mips,mips1004Kc";
+			reg = <0x0>;
 		};
 
 		cpu@1 {
+			device_type = "cpu";
 			compatible = "mips,mips1004Kc";
+			reg = <0x1>;
 		};
 	};
 
-	cpuintc: cpuintc@0 {
+	cpuintc: cpuintc {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
 		interrupt-controller;
@@ -26,7 +33,7 @@ 
 		serial0 = &uartlite;
 	};
 
-	cpuclock: cpuclock@0 {
+	cpuclock: cpuclock {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 
@@ -34,7 +41,7 @@ 
 		clock-frequency = <880000000>;
 	};
 
-	sysclock: sysclock@0 {
+	sysclock: sysclock {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 
@@ -462,8 +469,6 @@ 
 
 			#address-cells = <3>;
 			#size-cells = <2>;
-
-			device_type = "pci";
 		};
 
 		pcie1 {
@@ -471,8 +476,6 @@ 
 
 			#address-cells = <3>;
 			#size-cells = <2>;
-
-			device_type = "pci";
 		};
 
 		pcie2 {
@@ -480,8 +483,6 @@ 
 
 			#address-cells = <3>;
 			#size-cells = <2>;
-
-			device_type = "pci";
 		};
 	};
 };