@@ -27,3 +27,30 @@ define Profile/DLRTDEV01/Description
endef
$(eval $(call Profile,DLRTDEV01))
+
+define Profile/CAP324
+ NAME:=PowerCloud CAP324 Cloud AP
+ PACKAGES:=uboot-envtools
+endef
+
+define Profile/CAP324/Description
+ Package set optimized for the PowerCloud Systems CAP324 Cloud AP
+endef
+
+$(eval $(call Profile,CAP324))
+
+define Profile/CAP324NOCLOUD
+ NAME:=PowerCloud CAP324 Without Cloud
+ PACKAGES:=uboot-envtools
+endef
+
+define Profile/CAP324NOCLOUD/Description
+ Package set optimized for the PowerCloud Systems CAP324 Without Cloud
+ WARNING: Will remove certificates used by cloud firmware
+ After flashing this firmware you will not be able to
+ return the device to cloud operation.
+ The advantage is reclaiming flash used for the certificates.
+endef
+
+$(eval $(call Profile,CAP324NOCLOUD))
+
@@ -1190,6 +1190,8 @@ cameo_ap121_mtdlayout_8M=mtdparts=spi0.0:64k(u-boot)ro,64k(art)ro,64k(mac)ro,64k
cameo_ap123_mtdlayout_4M=mtdparts=spi0.0:64k(u-boot)ro,64k(nvram)ro,3712k(firmware),192k(lang)ro,64k(art)ro
cameo_db120_mtdlayout=mtdparts=spi0.0:64k(uboot)ro,64k(nvram)ro,15936k(firmware),192k(lang)ro,64k(mac)ro,64k(art)ro
cameo_db120_mtdlayout_8M=mtdparts=spi0.0:64k(uboot)ro,64k(nvram)ro,7872k(firmware),128k(lang)ro,64k(art)ro
+cap324_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env)ro,1536k(kernel),13760k(rootfs),640k(certs),64k(nvram),64k(art),15296k@0x50000(firmware)
+cap324nocloud_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env)ro,1536k(kernel),14464k(rootfs),64k(art),16000k@0x50000(firmware)
cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,1536k(kernel),12096k(rootfs),2048k(failsafe),64k(art),13632k@0xa0000(firmware)
cpe510_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(pation-table)ro,64k(product-info)ro,1536k(kernel),6144k(rootfs),192k(config)ro,64k(ART)ro,7680k@0x40000(firmware)
eap300v2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),320k(custom),13632k(firmware),2048k(failsafe),64k(art)ro
@@ -2036,6 +2038,8 @@ $(eval $(call SingleProfile,AthLzma,64k,AP143_8M,ap143-8M,AP143,ttyS0,115200,$$(
$(eval $(call SingleProfile,AthLzma,64k,AP143_16M,ap143-16M,AP143,ttyS0,115200,$$(ap143_mtdlayout_16M),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,AP147_010,ap147-010,AP147-010,ttyS0,115200,$$(ap147_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,ttyS0,115200,$$(bxu2000n2_mtdlayout),RKuImage))
+$(eval $(call SingleProfile,AthLzma,64k,CAP324,cap324,CAP324,ttyS0,115200,$$(cap324_mtdlayout),KRuImage))
+$(eval $(call SingleProfile,AthLzma,64k,CAP324NOCLOUD,cap324nocloud,CAP324,ttyS0,115200,$$(cap324nocloud_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,DRAGINO2,dragino2,DRAGINO2,ttyATH0,115200,$$(dragino2_mtdlayout),KRuImage,65536))
From 0247b8090d2808ae1002e1bc7478b94c90fcb4e1 Mon Sep 17 00:00:00 2001
From: Daniel Dickinson <openwrt@daniel.thecshore.com>
Date: Sun, 2 Aug 2015 01:34:52 -0400
Subject: [PATCH 2/8] CC PowerCloud CAP324 OpenWrt configuration
To: openwrt-devel@lists.openwrt.org
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
---
package/boot/uboot-envtools/files/ar71xx | 1 +
target/linux/ar71xx/base-files/etc/diag.sh | 3 +++
target/linux/ar71xx/base-files/etc/uci-defaults/01_leds | 6 ++++++
target/linux/ar71xx/base-files/etc/uci-defaults/02_network | 1 +
target/linux/ar71xx/base-files/lib/ar71xx.sh | 3 +++
target/linux/ar71xx/base-files/lib/upgrade/platform.sh | 1 +
6 files changed, 15 insertions(+)
@@ -15,6 +15,7 @@ board=$(ar71xx_board_name)
case "$board" in
all0258n | \
+cap324 | \
cap4200ag | \
carambola2 | \
eap300v2 | \
@@ -50,6 +50,9 @@ get_status_led() {
bxu2000n-2-a1)
status_led="bhu:green:status"
;;
+ cap324)
+ status_led="pcs:green:power"
+ ;;
cap4200ag)
status_led="senao:green:pwr"
;;
@@ -80,6 +80,12 @@ bxu2000n-2-a1)
ucidef_set_led_wlan "wlan" "WLAN" "bhu:green:wlan" "phy0tpt"
;;
+cap324)
+ ucidef_set_led_default "lan_green" "LAN_GREEN" "pcs:green:lan" "1"
+ ucidef_set_led_wlan "wlan0_amber" "WLAN_AMBER" "pcs:amber:wlan" "phy0tpt"
+ ucidef_set_led_wlan "wlan1_green" "WLAN_GREEN" "pcs:green:wlan" "phy1tpt"
+ ;;
+
cap4200ag)
ucidef_set_led_default "lan_green" "LAN_GREEN" "senao:green:lan" "1"
ucidef_set_led_wlan "wlan_amber" "WLAN_AMBER" "senao:amber:wlan" "phy0tpt"
@@ -325,6 +325,7 @@ dlan-pro-1200-ac)
all0305 |\
aw-nr580 |\
bullet-m |\
+cap324 |\
cap4200ag |\
eap300v2 |\
eap7660d |\
@@ -386,6 +386,9 @@ ar71xx_board_detect() {
*AW-NR580)
name="aw-nr580"
;;
+ *CAP324)
+ name="cap324"
+ ;;
*CAP4200AG)
name="cap4200ag"
;;
@@ -167,6 +167,7 @@ platform_check_image() {
case "$board" in
all0315n | \
all0258n | \
+ cap324 | \
cap4200ag)
platform_check_image_allnet "$1" && return 0
return 1
From 80c8dc8e4d5ad14b872d402dce2038d2f4bc3818 Mon Sep 17 00:00:00 2001
From: Daniel Dickinson <openwrt@daniel.thecshore.com>
Date: Sun, 2 Aug 2015 02:25:40 -0400
Subject: [PATCH 3/8] CC PowerCloud CR3000 Kernel BSP
To: openwrt-devel@lists.openwrt.org
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
---
target/linux/ar71xx/config-4.1 | 1 +
.../815-MIPS-ath79-add-cr3000-support.patch | 211 +++++++++++++++++++++
2 files changed, 212 insertions(+)
create mode 100644 target/linux/ar71xx/patches-4.1/815-MIPS-ath79-add-cr3000-support.patch
@@ -51,6 +51,7 @@ CONFIG_ATH79_MACH_CAP324=y
CONFIG_ATH79_MACH_CAP4200AG=y
CONFIG_ATH79_MACH_CARAMBOLA2=y
CONFIG_ATH79_MACH_CPE510=y
+CONFIG_ATH79_MACH_CR3000=y
CONFIG_ATH79_MACH_DB120=y
CONFIG_ATH79_MACH_DGL_5500_A1=y
CONFIG_ATH79_MACH_DHP_1565_A1=y
new file mode 100644
@@ -0,0 +1,211 @@
+Index: linux-4.1.3/arch/mips/ath79/Kconfig
+===================================================================
+--- linux-4.1.3.orig/arch/mips/ath79/Kconfig
++++ linux-4.1.3/arch/mips/ath79/Kconfig
+@@ -906,6 +906,16 @@ config ATH79_MACH_CAP324
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+
++config ATH79_MACH_CR3000
++ bool "PowerCloud Systems CR3000 support"
++ select SOC_AR934X
++ select ATH79_DEV_AP9X_PCI if PCI
++ select ATH79_DEV_ETH
++ select ATH79_DEV_GPIO_BUTTONS
++ select ATH79_DEV_LEDS_GPIO
++ select ATH79_DEV_M25P80
++ select ATH79_DEV_WMAC
++
+ config ATH79_MACH_EAP7660D
+ bool "Senao EAP7660D support"
+ select SOC_AR71XX
+Index: linux-4.1.3/arch/mips/ath79/Makefile
+===================================================================
+--- linux-4.1.3.orig/arch/mips/ath79/Makefile
++++ linux-4.1.3/arch/mips/ath79/Makefile
+@@ -59,6 +59,7 @@ obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A)
+ obj-$(CONFIG_ATH79_MACH_CAP324) += mach-cap324.o
+ obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
+ obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
++obj-$(CONFIG_ATH79_MACH_CR3000) += mach-cr3000.o
+ obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
+ obj-$(CONFIG_ATH79_MACH_DLAN_PRO_500_WP) += mach-dlan-pro-500-wp.o
+ obj-$(CONFIG_ATH79_MACH_DLAN_PRO_1200_AC) += mach-dlan-pro-1200-ac.o
+Index: linux-4.1.3/arch/mips/ath79/mach-cr3000.c
+===================================================================
+--- /dev/null
++++ linux-4.1.3/arch/mips/ath79/mach-cr3000.c
+@@ -0,0 +1,161 @@
++/*
++ * PowerCloud Systems CR3000 support
++ *
++ * Copyright (c) 2011 Qualcomm Atheros
++ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (c) 2012-2013 PowerCloud Systems
++ * Copyright (c) 2015 Daniel Dickinson <openwrt@daniel.thecshore.com>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ *
++ */
++
++#include <linux/gpio.h>
++#include <linux/pci.h>
++#include <linux/phy.h>
++#include <linux/platform_device.h>
++#include <linux/ath9k_platform.h>
++#include <linux/ar8216_platform.h>
++
++#include <asm/mach-ath79/ar71xx_regs.h>
++#include <asm/mach-ath79/ath79.h>
++
++#include "common.h"
++#include "dev-ap9x-pci.h"
++#include "dev-eth.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-m25p80.h"
++#include "dev-spi.h"
++#include "dev-wmac.h"
++#include "machtypes.h"
++
++#define CR3000_GPIO_LED_WLAN_2G 13
++#define CR3000_GPIO_LED_POWER_AMBER 15
++#define CR3000_GPIO_LED_WAN 18
++#define CR3000_GPIO_LED_LAN1 19
++#define CR3000_GPIO_LED_LAN2 20
++#define CR3000_GPIO_LED_LAN3 21
++#define CR3000_GPIO_LED_LAN4 22
++
++#define CR3000_GPIO_BTN_WPS 16
++#define CR3000_GPIO_BTN_RESET 17
++
++#define CR3000_KEYS_POLL_INTERVAL 20 /* msecs */
++#define CR3000_KEYS_DEBOUNCE_INTERVAL (3 * CR3000_KEYS_POLL_INTERVAL)
++
++#define CR3000_MAC0_OFFSET 0
++#define CR3000_MAC1_OFFSET 6
++#define CR3000_WMAC_CALDATA_OFFSET 0x1000
++#define CR3000_WMAC_MAC_OFFSET 0x1002
++#define CR3000_PCIE_CALDATA_OFFSET 0x5000
++
++static struct gpio_led cr3000_leds_gpio[] __initdata = {
++ {
++ .name = "pcs:amber:power",
++ .gpio = CR3000_GPIO_LED_POWER_AMBER,
++ .active_low = 1,
++ },
++ {
++ .name = "pcs:blue:wlan",
++ .gpio = CR3000_GPIO_LED_WLAN_2G,
++ .active_low = 1,
++ },
++ {
++ .name = "cr3000:blue:wan",
++ .gpio = CR3000_GPIO_LED_WAN,
++ .active_low = 1,
++ },
++ {
++ .name = "cr3000:blue:lan1",
++ .gpio = CR3000_GPIO_LED_LAN1,
++ .active_low = 1,
++ },
++ {
++ .name = "cr3000:blue:lan2",
++ .gpio = CR3000_GPIO_LED_LAN2,
++ .active_low = 1,
++ },
++ {
++ .name = "cr3000:blue:lan3",
++ .gpio = CR3000_GPIO_LED_LAN3,
++ .active_low = 1,
++ },
++ {
++ .name = "cr3000:blue:lan4",
++ .gpio = CR3000_GPIO_LED_LAN4,
++ .active_low = 1,
++ },
++};
++
++static struct gpio_keys_button cr3000_gpio_keys[] __initdata = {
++ {
++ .desc = "WPS button",
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .debounce_interval = CR3000_KEYS_DEBOUNCE_INTERVAL,
++ .gpio = CR3000_GPIO_BTN_WPS,
++ .active_low = 1,
++ },
++ {
++ .desc = "Reset button",
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .debounce_interval = CR3000_KEYS_DEBOUNCE_INTERVAL,
++ .gpio = CR3000_GPIO_BTN_RESET,
++ .active_low = 1,
++ },
++};
++
++static void __init cr3000_setup(void)
++{
++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
++
++ ath79_register_m25p80(NULL);
++
++ ath79_register_leds_gpio(-1, ARRAY_SIZE(cr3000_leds_gpio),
++ cr3000_leds_gpio);
++
++ ath79_register_gpio_keys_polled(-1, CR3000_KEYS_POLL_INTERVAL,
++ ARRAY_SIZE(cr3000_gpio_keys),
++ cr3000_gpio_keys);
++
++ /* WLAN 2GHz onboard */
++ ath79_register_wmac(art + CR3000_WMAC_CALDATA_OFFSET, art + CR3000_WMAC_MAC_OFFSET);
++
++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
++ AR934X_ETH_CFG_SW_ONLY_MODE);
++
++ ath79_register_mdio(1, 0x0);
++
++ /* WAN Fast Ethernet interface */
++ ath79_init_mac(ath79_eth0_data.mac_addr, art + CR3000_MAC0_OFFSET, 0);
++
++ ath79_switch_data.phy4_mii_en = 1;
++ ath79_switch_data.phy_poll_mask = BIT(0);
++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
++ ath79_eth0_data.phy_mask = BIT(0);
++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
++ ath79_register_eth(0);
++
++ /* Lan 4-port switch */
++ ath79_init_mac(ath79_eth1_data.mac_addr, art + CR3000_MAC1_OFFSET, 0);
++
++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
++ ath79_eth1_data.speed = SPEED_1000;
++ ath79_eth1_data.duplex = DUPLEX_FULL;
++ ath79_register_eth(1);
++}
++
++MIPS_MACHINE(ATH79_MACH_CR3000, "CR3000", "PowerCloud CR3000",
++ cr3000_setup);
+Index: linux-4.1.3/arch/mips/ath79/machtypes.h
+===================================================================
+--- linux-4.1.3.orig/arch/mips/ath79/machtypes.h
++++ linux-4.1.3/arch/mips/ath79/machtypes.h
+@@ -43,6 +43,7 @@ enum ath79_mach_type {
+ ATH79_MACH_CAP4200AG, /* Senao CAP4200AG */
+ ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */
+ ATH79_MACH_CPE510, /* TP-LINK CPE510 */
++ ATH79_MACH_CR3000, /* PowerCloud Systems CR3000 */
+ ATH79_MACH_DB120, /* Atheros DB120 reference board */
+ ATH79_MACH_PB44, /* Atheros PB44 reference board */
+ ATH79_MACH_DGL_5500_A1, /* D-link DGL-5500 rev. A1 */
From 195c5945ed6ae90aab46f98a5c38e715c44fa278 Mon Sep 17 00:00:00 2001
From: Daniel Dickinson <openwrt@daniel.thecshore.com>
Date: Sun, 2 Aug 2015 02:40:46 -0400
Subject: [PATCH 4/8] CC PowerCloud CR3000 image generation
To: openwrt-devel@lists.openwrt.org
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
---
target/linux/ar71xx/generic/profiles/pcs.mk | 26 ++++++++++++++++++++++++++
target/linux/ar71xx/image/Makefile | 4 ++++
2 files changed, 30 insertions(+)
@@ -54,3 +54,29 @@ endef
$(eval $(call Profile,CAP324NOCLOUD))
+define Profile/CR3000
+ NAME:=PowerCloud CR3000 Cloud Router
+ PACKAGES:=uboot-envtools
+endef
+
+define Profile/CR3000/Description
+ Package set optimized for the PowerCloud Systems CR3000 Cloud Router
+endef
+
+$(eval $(call Profile,CR3000))
+
+define Profile/CR3000NOCLOUD
+ NAME:=PowerCloud CR3000 Without Cloud
+ PACKAGES:=uboot-envtools
+endef
+
+define Profile/CR3000NOCLOUD/Description
+ Package set optimized for the PowerCloud Systems CR3000 Without Cloud
+ WARNING: Will remove certificates used by cloud firmware
+ After flashing this firmware you will not be able to
+ return the device to cloud operation.
+ The advantage is reclaiming flash used for the certificates.
+endef
+
+$(eval $(call Profile,CR3000NOCLOUD))
+
@@ -1194,6 +1194,8 @@ cap324_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env)ro,1536k(kernel),13
cap324nocloud_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env)ro,1536k(kernel),14464k(rootfs),64k(art),16000k@0x50000(firmware)
cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,1536k(kernel),12096k(rootfs),2048k(failsafe),64k(art),13632k@0xa0000(firmware)
cpe510_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(pation-table)ro,64k(product-info)ro,1536k(kernel),6144k(rootfs),192k(config)ro,64k(ART)ro,7680k@0x40000(firmware)
+cr3000_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),5696k(rootfs),640k(certs),64k(nvram),64k(art)ro,7104k@0x50000(firmware)
+cr3000nocloud_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),6400k(rootfs),64k(art)ro,7808k@0x50000(firmware)
eap300v2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),320k(custom),13632k(firmware),2048k(failsafe),64k(art)ro
db120_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
dgl_5500_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,15296k(firmware),192k(lang)ro,512k(my-dlink)ro,64k(mac)ro,64k(art)ro
@@ -2041,6 +2043,8 @@ $(eval $(call SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,tt
$(eval $(call SingleProfile,AthLzma,64k,CAP324,cap324,CAP324,ttyS0,115200,$$(cap324_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,CAP324NOCLOUD,cap324nocloud,CAP324,ttyS0,115200,$$(cap324nocloud_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage))
+$(eval $(call SingleProfile,AthLzma,64k,CR3000,cr3000,CR3000,ttyS0,115200,$$(cr3000_mtdlayout),KRuImage))
+$(eval $(call SingleProfile,AthLzma,64k,CR3000NOCLOUD,cr3000nocloud,CR3000,ttyS0,115200,$$(cr3000nocloud_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,DRAGINO2,dragino2,DRAGINO2,ttyATH0,115200,$$(dragino2_mtdlayout),KRuImage,65536))
$(eval $(call SingleProfile,AthLzma,64k,EWDORINAP,ew-dorin,EW-DORIN,ttyATH0,115200,$$(ew-dorin_mtdlayout_4M),KRuImage,65536))
From b5af3842340eece1ab707a650130b6d69e3bc140 Mon Sep 17 00:00:00 2001
From: Daniel Dickinson <openwrt@daniel.thecshore.com>
Date: Sun, 2 Aug 2015 02:59:20 -0400
Subject: [PATCH 5/8] CC PowerCloud CR3000 OpenWrt configuration
To: openwrt-devel@lists.openwrt.org
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
---
package/boot/uboot-envtools/files/ar71xx | 1 +
target/linux/ar71xx/base-files/etc/diag.sh | 3 +++
target/linux/ar71xx/base-files/etc/uci-defaults/01_leds | 9 +++++++++
target/linux/ar71xx/base-files/etc/uci-defaults/02_network | 6 ++++++
target/linux/ar71xx/base-files/lib/ar71xx.sh | 3 +++
target/linux/ar71xx/base-files/lib/upgrade/platform.sh | 3 ++-
6 files changed, 24 insertions(+), 1 deletion(-)
@@ -18,6 +18,7 @@ all0258n | \
cap324 | \
cap4200ag | \
carambola2 | \
+cr3000 | \
eap300v2 | \
hornet-ub | \
hornet-ub-x2 | \
@@ -59,6 +59,9 @@ get_status_led() {
cpe510)
status_led="tp-link:green:link4"
;;
+ cr3000)
+ status_led="pcs:amber:power"
+ ;;
db120)
status_led="db120:green:status"
;;
@@ -108,6 +108,15 @@ cpe510)
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "tp-link:green:link4" "wlan0" "76" "100" "-75" "13"
;;
+cr3000)
+ ucidef_set_led_netdev "wan" "WAN" "pcs:blue:wan" "eth1"
+ ucidef_set_led_switch "lan1" "LAN1" "pcs:green:lan1" "switch0" "0x04"
+ ucidef_set_led_switch "lan2" "LAN2" "pcs:green:lan2" "switch0" "0x08"
+ ucidef_set_led_switch "lan3" "LAN3" "pcs:green:lan3" "switch0" "0x10"
+ ucidef_set_led_switch "lan4" "LAN4" "pcs:green:lan4" "switch0" "0x02"
+ ucidef_set_led_wlan "wlan" "WLAN" "pcs:blue:wlan" "phy0tpt"
+ ;;
+
db120)
ucidef_set_led_usbdev "usb" "USB" "db120:green:usb" "1-1"
;;
@@ -263,6 +263,12 @@ wzr-hp-g300nh)
ucidef_add_switch_vlan "switch0" "1" "0 1 2 3 5t"
;;
+cr3000)
+ ucidef_set_interfaces_lan_wan "eth0.1" "eth1"
+ ucidef_add_switch "switch0" "1" "1"
+ ucidef_add_switch_vlan "switch0" "1" "0t 1 2 3 4"
+ ;;
+
dgl-5500-a1 |\
dir-825-c1)
local mac
@@ -396,6 +396,9 @@ ar71xx_board_detect() {
name="cpe510"
tplink_pharos_board_detect
;;
+ *CR3000)
+ name="cr3000"
+ ;;
*"DB120 reference board")
name="db120"
;;
@@ -168,7 +168,8 @@ platform_check_image() {
all0315n | \
all0258n | \
cap324 | \
- cap4200ag)
+ cap4200ag | \
+ cr3000)
platform_check_image_allnet "$1" && return 0
return 1
;;
From a6cdf0dbc19a42a9f5419b4a65df235a5e0f517d Mon Sep 17 00:00:00 2001
From: Daniel Dickinson <openwrt@daniel.thecshore.com>
Date: Sun, 2 Aug 2015 03:30:25 -0400
Subject: [PATCH 6/8] CC PowerCloud CR5000 Kernel BSP
To: openwrt-devel@lists.openwrt.org
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
---
target/linux/ar71xx/config-4.1 | 1 +
.../816-MIPS-ath79-add-cr5000-support.patch | 230 +++++++++++++++++++++
2 files changed, 231 insertions(+)
create mode 100644 target/linux/ar71xx/patches-4.1/816-MIPS-ath79-add-cr5000-support.patch
@@ -52,6 +52,7 @@ CONFIG_ATH79_MACH_CAP4200AG=y
CONFIG_ATH79_MACH_CARAMBOLA2=y
CONFIG_ATH79_MACH_CPE510=y
CONFIG_ATH79_MACH_CR3000=y
+CONFIG_ATH79_MACH_CR5000=y
CONFIG_ATH79_MACH_DB120=y
CONFIG_ATH79_MACH_DGL_5500_A1=y
CONFIG_ATH79_MACH_DHP_1565_A1=y
new file mode 100644
@@ -0,0 +1,230 @@
+Index: linux-4.1.3/arch/mips/ath79/Kconfig
+===================================================================
+--- linux-4.1.3.orig/arch/mips/ath79/Kconfig
++++ linux-4.1.3/arch/mips/ath79/Kconfig
+@@ -916,6 +916,17 @@ config ATH79_MACH_CR3000
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+
++config ATH79_MACH_CR3000
++ bool "PowerCloud Systems CR5000 support"
++ select SOC_AR934X
++ select ATH79_DEV_AP9X_PCI if PCI
++ select ATH79_DEV_ETH
++ select ATH79_DEV_GPIO_BUTTONS
++ select ATH79_DEV_LEDS_GPIO
++ select ATH79_DEV_M25P80
++ select ATH79_DEV_USB
++ select ATH79_DEV_WMAC
++
+ config ATH79_MACH_EAP7660D
+ bool "Senao EAP7660D support"
+ select SOC_AR71XX
+Index: linux-4.1.3/arch/mips/ath79/Makefile
+===================================================================
+--- linux-4.1.3.orig/arch/mips/ath79/Makefile
++++ linux-4.1.3/arch/mips/ath79/Makefile
+@@ -60,6 +60,7 @@ obj-$(CONFIG_ATH79_MACH_CAP324) += mach
+ obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
+ obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
+ obj-$(CONFIG_ATH79_MACH_CR3000) += mach-cr3000.o
++obj-$(CONFIG_ATH79_MACH_CR5000) += mach-cr5000.o
+ obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
+ obj-$(CONFIG_ATH79_MACH_DLAN_PRO_500_WP) += mach-dlan-pro-500-wp.o
+ obj-$(CONFIG_ATH79_MACH_DLAN_PRO_1200_AC) += mach-dlan-pro-1200-ac.o
+Index: linux-4.1.3/arch/mips/ath79/mach-cr5000.c
+===================================================================
+--- /dev/null
++++ linux-4.1.3/arch/mips/ath79/mach-cr5000.c
+@@ -0,0 +1,179 @@
++/*
++ * PowerCloud CR5000 support
++ *
++ * Copyright (c) 2011 Qualcomm Atheros
++ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
++ * Copyright (c) 2012-2013 PowerCloud Systems
++ * Copyright (c) 2015 Daniel Dickinson <openwrt@daniel.thecshore.com>
++ *
++ * Permission to use, copy, modify, and/or distribute this software for any
++ * purpose with or without fee is hereby granted, provided that the above
++ * copyright notice and this permission notice appear in all copies.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
++ *
++ */
++
++#include <linux/gpio.h>
++#include <linux/pci.h>
++#include <linux/phy.h>
++#include <linux/platform_device.h>
++#include <linux/ath9k_platform.h>
++#include <linux/ar8216_platform.h>
++
++#include <asm/mach-ath79/ar71xx_regs.h>
++#include <asm/mach-ath79/ath79.h>
++
++#include "common.h"
++#include "dev-ap9x-pci.h"
++#include "dev-eth.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-m25p80.h"
++#include "dev-spi.h"
++#include "dev-usb.h"
++#include "dev-wmac.h"
++#include "machtypes.h"
++
++#define CR5000_GPIO_LED_WLAN_2G 14
++#define CR5000_GPIO_LED_WPS 12
++#define CR5000_GPIO_LED_POWER_AMBER 4
++/* GPIO2 has to have JTAG disabled as it is also to
++ * power led
++ */
++#define CR5000_GPIO_LED_POWER_ENABLE 2
++#define CR5000_GPIO_BTN_WPS 16
++#define CR5000_GPIO_BTN_WPS 17
++
++#define CR5000_KEYS_POLL_INTERVAL 20 /* msecs */
++#define CR5000_KEYS_DEBOUNCE_INTERVAL (3 * CR5000_KEYS_POLL_INTERVAL)
++
++#define CR5000_MAC0_OFFSET 0
++#define CR5000_MAC1_OFFSET 6
++#define CR5000_WMAC_CALDATA_OFFSET 0x1000
++#define CR5000_WMAC_MAC_OFFSET 0x1002
++#define CR5000_PCIE_CALDATA_OFFSET 0x5000
++#define CR5000_PCIE_MAC_OFFSET 0x5002
++
++static struct gpio_led cr5000_leds_gpio[] __initdata = {
++ {
++ .name = "pcs:amber:power",
++ .gpio = CR5000_GPIO_LED_POWER_AMBER,
++ .active_low = 1,
++ },
++ {
++ .name = "pcs:white:wps",
++ .gpio = CR5000_GPIO_LED_WPS,
++ .active_low = 1,
++ },
++ {
++ .name = "pcs:blue:wlan",
++ .gpio = CR5000_GPIO_LED_WLAN_2G,
++ .active_low = 1,
++ },
++};
++
++static struct gpio_keys_button cr5000_gpio_keys[] __initdata = {
++ {
++ .desc = "WPS button",
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .debounce_interval = CR5000_KEYS_DEBOUNCE_INTERVAL,
++ .gpio = CR5000_GPIO_BTN_WPS,
++ .active_low = 1,
++ },
++ {
++ .desc = "Reset button",
++ .type = EV_KEY,
++ .code = KEY_WPS_BUTTON,
++ .debounce_interval = CR5000_KEYS_DEBOUNCE_INTERVAL,
++ .gpio = CR5000_GPIO_BTN_RESET,
++ .active_low = 1,
++ },
++};
++
++static struct ar8327_pad_cfg cr5000_ar8327_pad0_cfg = {
++ .mode = AR8327_PAD_MAC_RGMII,
++ .txclk_delay_en = true,
++ .rxclk_delay_en = true,
++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
++};
++
++static struct ar8327_led_cfg cr5000_ar8327_led_cfg = {
++ .led_ctrl0 = 0x00000000,
++ .led_ctrl1 = 0xc737c737,
++ .led_ctrl2 = 0x00000000,
++ .led_ctrl3 = 0x00c30c00,
++ .open_drain = true,
++};
++
++static struct ar8327_platform_data cr5000_ar8327_data = {
++ .pad0_cfg = &cr5000_ar8327_pad0_cfg,
++ .port0_cfg = {
++ .force_link = 1,
++ .speed = AR8327_PORT_SPEED_1000,
++ .duplex = 1,
++ .txpause = 1,
++ .rxpause = 1,
++ },
++ .led_cfg = &cr5000_ar8327_led_cfg,
++};
++
++static struct mdio_board_info cr5000_mdio0_info[] = {
++ {
++ .bus_id = "ag71xx-mdio.0",
++ .phy_addr = 0,
++ .platform_data = &cr5000_ar8327_data,
++ },
++};
++
++static void __init cr5000_setup(void)
++{
++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
++
++ ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
++ gpio_request_one(CR5000_GPIO_LED_POWER_ENABLE,
++ GPIOF_OUT_INIT_LOW, "Power LED enable");
++ ath79_gpio_output_select(CR5000_GPIO_LED_POWER_AMBER, AR934X_GPIO_OUT_GPIO);
++ ath79_gpio_output_select(CR5000_GPIO_LED_WLAN_2G, AR934X_GPIO_OUT_GPIO);
++ ath79_gpio_output_select(CR5000_GPIO_LED_WPS, AR934X_GPIO_OUT_GPIO);
++
++ ath79_register_m25p80(NULL);
++
++ ath79_register_leds_gpio(-1, ARRAY_SIZE(cr5000_leds_gpio),
++ cr5000_leds_gpio);
++ ath79_register_gpio_keys_polled(-1, CR5000_KEYS_POLL_INTERVAL,
++ ARRAY_SIZE(cr5000_gpio_keys),
++ cr5000_gpio_keys);
++ ath79_register_usb();
++ ath79_register_wmac(art + CR5000_WMAC_CALDATA_OFFSET, art + CR5000_WMAC_MAC_OFFSET;
++ ap94_pci_init(NULL, NULL, NULL, NULL, art + CR5000_PCIE_MAC_OFFSET;
++
++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
++ AR934X_ETH_CFG_SW_ONLY_MODE);
++
++ ath79_register_mdio(1, 0x0);
++ ath79_register_mdio(0, 0x0);
++
++ ath79_init_mac(ath79_eth0_data.mac_addr, art + CR5000_MAC0_OFFSET, 0);
++
++ mdiobus_register_board_info(cr5000_mdio0_info,
++ ARRAY_SIZE(cr5000_mdio0_info));
++
++ /* GMAC0 is connected to an AR8327 switch */
++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
++ ath79_eth0_data.phy_mask = BIT(0);
++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
++ ath79_eth0_pll_data.pll_1000 = 0x06000000;
++ ath79_register_eth(0);
++}
++
++MIPS_MACHINE(ATH79_MACH_CR5000, "CR5000", "PowerCloud CR5000",
++ cr5000_setup);
+Index: linux-4.1.3/arch/mips/ath79/machtypes.h
+===================================================================
+--- linux-4.1.3.orig/arch/mips/ath79/machtypes.h
++++ linux-4.1.3/arch/mips/ath79/machtypes.h
+@@ -44,6 +44,7 @@ enum ath79_mach_type {
+ ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */
+ ATH79_MACH_CPE510, /* TP-LINK CPE510 */
+ ATH79_MACH_CR3000, /* PowerCloud Systems CR3000 */
++ ATH79_MACH_CR5000, /* PowerCloud Systems CR5000 */
+ ATH79_MACH_DB120, /* Atheros DB120 reference board */
+ ATH79_MACH_PB44, /* Atheros PB44 reference board */
+ ATH79_MACH_DGL_5500_A1, /* D-link DGL-5500 rev. A1 */
From 7dc741d52ae86dc1dbbbd99dd380a2c6efe5ebc5 Mon Sep 17 00:00:00 2001
From: Daniel Dickinson <openwrt@daniel.thecshore.com>
Date: Sun, 2 Aug 2015 03:42:48 -0400
Subject: [PATCH 7/8] CC PowerCloud CR5000 image generation
To: openwrt-devel@lists.openwrt.org
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
---
target/linux/ar71xx/generic/profiles/pcs.mk | 26 ++++++++++++++++++++++++++
target/linux/ar71xx/image/Makefile | 4 ++++
2 files changed, 30 insertions(+)
@@ -80,3 +80,29 @@ endef
$(eval $(call Profile,CR3000NOCLOUD))
+define Profile/CR5000
+ NAME:=PowerCloud CR5000 Cloud Router
+ PACKAGES:=uboot-envtools kmod-usb-core kmod-usb2 kmod-usb-ohci kmod-ledtrig-usbdev
+endef
+
+define Profile/CR5000/Description
+ Package set optimized for the PowerCloud Systems CR5000 Cloud Router
+endef
+
+$(eval $(call Profile,CR5000))
+
+define Profile/CR5000NOCLOUD
+ NAME:=PowerCloud CR5000 Without Cloud
+ PACKAGES:=uboot-envtools kmod-usb-core kmod-usb2 kmod-usb-ohci kmod-ledtrig-usbdev
+endef
+
+define Profile/CR5000NOCLOUD/Description
+ Package set optimized for the PowerCloud Systems CR5000 Without Cloud
+ WARNING: Will remove certificates used by cloud firmware
+ After flashing this firmware you will not be able to
+ return the device to cloud operation.
+ The advantage is reclaiming flash used for the certificates.
+endef
+
+$(eval $(call Profile,CR5000NOCLOUD))
+
@@ -1196,6 +1196,8 @@ cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,
cpe510_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(pation-table)ro,64k(product-info)ro,1536k(kernel),6144k(rootfs),192k(config)ro,64k(ART)ro,7680k@0x40000(firmware)
cr3000_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),5696k(rootfs),640k(certs),64k(nvram),64k(art)ro,7104k@0x50000(firmware)
cr3000nocloud_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),6400k(rootfs),64k(art)ro,7808k@0x50000(firmware)
+cr5000_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),5760k(rootfs),640k(certs),64k(nvram),64k(art)ro,7104k@0x50000(firmware)
+cr5000nocloud_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),6400k(rootfs),64k(art)ro,7808k@0x50000(firmware)
eap300v2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),320k(custom),13632k(firmware),2048k(failsafe),64k(art)ro
db120_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
dgl_5500_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,15296k(firmware),192k(lang)ro,512k(my-dlink)ro,64k(mac)ro,64k(art)ro
@@ -2045,6 +2047,8 @@ $(eval $(call SingleProfile,AthLzma,64k,CAP324NOCLOUD,cap324nocloud,CAP324,ttyS0
$(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,CR3000,cr3000,CR3000,ttyS0,115200,$$(cr3000_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,CR3000NOCLOUD,cr3000nocloud,CR3000,ttyS0,115200,$$(cr3000nocloud_mtdlayout),KRuImage))
+$(eval $(call SingleProfile,AthLzma,64k,CR5000,cr5000,CR5000,ttyS0,115200,$$(cr5000_mtdlayout),KRuImage))
+$(eval $(call SingleProfile,AthLzma,64k,CR5000NOCLOUD,cr5000nocloud,CR5000,ttyS0,115200,$$(cr5000nocloud_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,DRAGINO2,dragino2,DRAGINO2,ttyATH0,115200,$$(dragino2_mtdlayout),KRuImage,65536))
$(eval $(call SingleProfile,AthLzma,64k,EWDORINAP,ew-dorin,EW-DORIN,ttyATH0,115200,$$(ew-dorin_mtdlayout_4M),KRuImage,65536))
From cdae809853876e61a5406e00cdb5f52d47d4ffc0 Mon Sep 17 00:00:00 2001
From: Daniel Dickinson <openwrt@daniel.thecshore.com>
Date: Sun, 2 Aug 2015 03:49:02 -0400
Subject: [PATCH 8/8] CC PowerCloud CR5000 OpenWrt configuration
To: openwrt-devel@lists.openwrt.org
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
---
package/boot/uboot-envtools/files/ar71xx | 1 +
target/linux/ar71xx/base-files/etc/diag.sh | 3 +++
target/linux/ar71xx/base-files/etc/uci-defaults/01_leds | 5 +++++
target/linux/ar71xx/base-files/etc/uci-defaults/02_network | 1 +
target/linux/ar71xx/base-files/lib/ar71xx.sh | 3 +++
target/linux/ar71xx/base-files/lib/upgrade/platform.sh | 3 ++-
6 files changed, 15 insertions(+), 1 deletion(-)
@@ -19,6 +19,7 @@ cap324 | \
cap4200ag | \
carambola2 | \
cr3000 | \
+cr5000 | \
eap300v2 | \
hornet-ub | \
hornet-ub-x2 | \
@@ -62,6 +62,9 @@ get_status_led() {
cr3000)
status_led="pcs:amber:power"
;;
+ cr5000)
+ status_led="pcs:amber:power"
+ ;;
db120)
status_led="db120:green:status"
;;
@@ -117,6 +117,11 @@ cr3000)
ucidef_set_led_wlan "wlan" "WLAN" "pcs:blue:wlan" "phy0tpt"
;;
+cr5000)
+ ucidef_set_led_wlan "wlan" "WLAN" "pcs:blue:wlan" "phy0tpt"
+ ucidef_set_led_usbdev "usb" "USB" "pcs:white:wps" "1-1"
+ ;;
+
db120)
ucidef_set_led_usbdev "usb" "USB" "db120:green:usb" "1-1"
;;
@@ -31,6 +31,7 @@ wlr8100)
ucidef_add_switch_vlan "switch0" "2" "0t 1"
;;
+cr5000 |\
esr1750 |\
epg5000)
ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
@@ -399,6 +399,9 @@ ar71xx_board_detect() {
*CR3000)
name="cr3000"
;;
+ *CR5000)
+ name="cr5000"
+ ;;
*"DB120 reference board")
name="db120"
;;
@@ -169,7 +169,8 @@ platform_check_image() {
all0258n | \
cap324 | \
cap4200ag | \
- cr3000)
+ cr3000 |\
+ cr5000)
platform_check_image_allnet "$1" && return 0
return 1
;;