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[OpenWrt-Devel,RFC,v2,3/6] ar71xx: Fix size of the QCA955x GMAC registers

Message ID 1459863133-26810-3-git-send-email-sven@open-mesh.com
State RFC
Headers show

Commit Message

Sven Eckelmann April 5, 2016, 1:32 p.m. UTC 
From: Sven Eckelmann <sven.eckelmann@open-mesh.com>

The GMAC registers for QCA9558 are from 0x18070000-0x18070067. Some of the
upper registers are required to correctly reset SGMII links on speed
changes.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
---
v2:
 - Split into multiple patches and adjust slightly to look more like an
   OpenWrt patch

 .../ar71xx/patches-4.1/601-MIPS-ath79-add-more-register-defines.patch   | 2 +-
 .../ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/target/linux/ar71xx/patches-4.1/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-4.1/601-MIPS-ath79-add-more-register-defines.patch
index 0126f6a..ae44285 100644
--- a/target/linux/ar71xx/patches-4.1/601-MIPS-ath79-add-more-register-defines.patch
+++ b/target/linux/ar71xx/patches-4.1/601-MIPS-ath79-add-more-register-defines.patch
@@ -47,7 +47,7 @@ 
  #define QCA955X_PCI_CTRL_SIZE	0x100
  
 +#define QCA955X_GMAC_BASE	(AR71XX_APB_BASE + 0x00070000)
-+#define QCA955X_GMAC_SIZE	0x40
++#define QCA955X_GMAC_SIZE	0x68
  #define QCA955X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)
  #define QCA955X_WMAC_SIZE	0x20000
  #define QCA955X_EHCI0_BASE	0x1b000000
diff --git a/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch
index 0126f6a..ae44285 100644
--- a/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch
+++ b/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch
@@ -47,7 +47,7 @@ 
  #define QCA955X_PCI_CTRL_SIZE	0x100
  
 +#define QCA955X_GMAC_BASE	(AR71XX_APB_BASE + 0x00070000)
-+#define QCA955X_GMAC_SIZE	0x40
++#define QCA955X_GMAC_SIZE	0x68
  #define QCA955X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)
  #define QCA955X_WMAC_SIZE	0x20000
  #define QCA955X_EHCI0_BASE	0x1b000000