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[2003:62:5f4f:1204:c801:4149:b0ac:40e]) by smtp.googlemail.com with ESMTPSA id r4sm19123440wjy.39.2016.01.17.04.30.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Jan 2016 04:30:40 -0800 (PST) From: Martin Blumenstingl To: openwrt-devel@lists.openwrt.org Date: Sun, 17 Jan 2016 13:30:07 +0100 Message-Id: <1453033818-30205-3-git-send-email-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1453033818-30205-1-git-send-email-martin.blumenstingl@googlemail.com> References: <1453033818-30205-1-git-send-email-martin.blumenstingl@googlemail.com> Cc: hauke@hauke-m.de Subject: [OpenWrt-Devel] [PATCH 02/13] lantiq: Use the new pinctrl compatible strings X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" These were introduced in upstream commit be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree bindings" and finally allow us to use the individual pins within our dts (for example spi_clk, etc.). Please note that this changes the number of GPIOs which are available for some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56 pins were exposed. This means that all places which are using hardcoded GPIO numbers (which are not passed via device-tree) need to be adjusted (because the first GPIO number is now 462, instead of 456). Signed-off-by: Martin Blumenstingl --- target/linux/lantiq/dts/amazonse.dtsi | 2 +- target/linux/lantiq/dts/ar9.dtsi | 2 +- target/linux/lantiq/dts/danube.dtsi | 2 +- target/linux/lantiq/dts/vr9.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/linux/lantiq/dts/amazonse.dtsi b/target/linux/lantiq/dts/amazonse.dtsi index 13d3e73..5389446 100644 --- a/target/linux/lantiq/dts/amazonse.dtsi +++ b/target/linux/lantiq/dts/amazonse.dtsi @@ -90,7 +90,7 @@ }; gpio: pinmux@E100B10 { - compatible = "lantiq,pinctrl-ase"; + compatible = "lantiq,ase-pinctrl"; #gpio-cells = <2>; gpio-controller; reg = <0xE100B10 0xA0>; diff --git a/target/linux/lantiq/dts/ar9.dtsi b/target/linux/lantiq/dts/ar9.dtsi index ee4e374..f69a7ae 100644 --- a/target/linux/lantiq/dts/ar9.dtsi +++ b/target/linux/lantiq/dts/ar9.dtsi @@ -101,7 +101,7 @@ }; gpio: pinmux@E100B10 { - compatible = "lantiq,pinctrl-xr9"; + compatible = "lantiq,xrx100-pinctrl"; #gpio-cells = <2>; gpio-controller; reg = <0xE100B10 0xA0>; diff --git a/target/linux/lantiq/dts/danube.dtsi b/target/linux/lantiq/dts/danube.dtsi index 698196d..0a75fd9 100644 --- a/target/linux/lantiq/dts/danube.dtsi +++ b/target/linux/lantiq/dts/danube.dtsi @@ -123,7 +123,7 @@ }; gpio: pinmux@E100B10 { - compatible = "lantiq,pinctrl-xway"; + compatible = "lantiq,danube-pinctrl"; #gpio-cells = <2>; gpio-controller; reg = <0xE100B10 0xA0>; diff --git a/target/linux/lantiq/dts/vr9.dtsi b/target/linux/lantiq/dts/vr9.dtsi index df63ce7..8f96358 100644 --- a/target/linux/lantiq/dts/vr9.dtsi +++ b/target/linux/lantiq/dts/vr9.dtsi @@ -113,7 +113,7 @@ }; gpio: pinmux@E100B10 { - compatible = "lantiq,pinctrl-xr9"; + compatible = "lantiq,xrx200-pinctrl"; #gpio-cells = <2>; gpio-controller; reg = <0xE100B10 0xA0>;