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[68.189.91.139]) by smtp.gmail.com with ESMTPSA id u21sm5213793pfi.15.2016.01.08.06.16.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jan 2016 06:16:04 -0800 (PST) From: Tim Harvey To: Luka Perkov , Felix Fietkau Date: Fri, 8 Jan 2016 06:15:45 -0800 Message-Id: <1452262545-14907-1-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 1.9.1 Cc: OpenWrt Development List Subject: [OpenWrt-Devel] [PATCH] imx6: fix upstream patch name X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" Signed-off-by: Tim Harvey --- ...llow-HDMI-and-LVDS-to-work-simultaneously.patch | 76 ++++++++++++++++++++++ ...mx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch | 76 ---------------------- 2 files changed, 76 insertions(+), 76 deletions(-) create mode 100644 target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-Allow-HDMI-and-LVDS-to-work-simultaneously.patch delete mode 100644 target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch diff --git a/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-Allow-HDMI-and-LVDS-to-work-simultaneously.patch b/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-Allow-HDMI-and-LVDS-to-work-simultaneously.patch new file mode 100644 index 0000000..768648e --- /dev/null +++ b/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-Allow-HDMI-and-LVDS-to-work-simultaneously.patch @@ -0,0 +1,76 @@ +From d86b202436b6f3111c4c37b8701daa0764d2ca55 Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Thu, 5 Nov 2015 11:10:00 -0800 +Subject: [PATCH 3/3] ARM: dts: imx: ventana: Allow HDMI and LVDS to work + simultaneously + +Currently it is not possible to have HDMI and LVDS working simultaneously, +because both ports try to use PLL5. + +Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be +driven from independent sources. + +With this change the LDB pixel clock goes to 68.57 MHz, which is still +within the valid range for the displays supported by the Ventana boards. + +Signed-off-by: Tim Harvey +--- + arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 7 +++++++ + arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 7 +++++++ + arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 7 +++++++ + 3 files changed, 21 insertions(+) + +Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +=================================================================== +--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-11-01 16:05:25.000000000 -0800 ++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-12-18 10:43:32.000000000 -0800 +@@ -151,6 +151,13 @@ + status = "okay"; + }; + ++&clks { ++ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, ++ <&clks IMX6QDL_CLK_LDB_DI1_SEL>; ++ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, ++ <&clks IMX6QDL_CLK_PLL3_USB_OTG>; ++}; ++ + &fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; +Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +=================================================================== +--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 2015-12-18 10:39:44.867158318 -0800 ++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 2015-12-18 10:43:32.000000000 -0800 +@@ -152,6 +152,13 @@ + status = "okay"; + }; + ++&clks { ++ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, ++ <&clks IMX6QDL_CLK_LDB_DI1_SEL>; ++ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, ++ <&clks IMX6QDL_CLK_PLL3_USB_OTG>; ++}; ++ + &fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; +Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +=================================================================== +--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 2015-12-18 10:39:44.871158318 -0800 ++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 2015-12-18 10:43:32.000000000 -0800 +@@ -142,6 +142,13 @@ + status = "okay"; + }; + ++&clks { ++ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, ++ <&clks IMX6QDL_CLK_LDB_DI1_SEL>; ++ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, ++ <&clks IMX6QDL_CLK_PLL3_USB_OTG>; ++}; ++ + &fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; diff --git a/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch b/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch deleted file mode 100644 index 768648e..0000000 --- a/target/linux/imx6/patches-4.3/037-ARM-dts-imx-ventana-fix-GW53xx-GW54xx-lvds-channel.patch +++ /dev/null @@ -1,76 +0,0 @@ -From d86b202436b6f3111c4c37b8701daa0764d2ca55 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Thu, 5 Nov 2015 11:10:00 -0800 -Subject: [PATCH 3/3] ARM: dts: imx: ventana: Allow HDMI and LVDS to work - simultaneously - -Currently it is not possible to have HDMI and LVDS working simultaneously, -because both ports try to use PLL5. - -Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be -driven from independent sources. - -With this change the LDB pixel clock goes to 68.57 MHz, which is still -within the valid range for the displays supported by the Ventana boards. - -Signed-off-by: Tim Harvey ---- - arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 7 +++++++ - arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 7 +++++++ - arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 7 +++++++ - 3 files changed, 21 insertions(+) - -Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi -=================================================================== ---- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-11-01 16:05:25.000000000 -0800 -+++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-12-18 10:43:32.000000000 -0800 -@@ -151,6 +151,13 @@ - status = "okay"; - }; - -+&clks { -+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, -+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>; -+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, -+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>; -+}; -+ - &fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; -Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi -=================================================================== ---- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 2015-12-18 10:39:44.867158318 -0800 -+++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 2015-12-18 10:43:32.000000000 -0800 -@@ -152,6 +152,13 @@ - status = "okay"; - }; - -+&clks { -+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, -+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>; -+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, -+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>; -+}; -+ - &fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; -Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi -=================================================================== ---- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 2015-12-18 10:39:44.871158318 -0800 -+++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 2015-12-18 10:43:32.000000000 -0800 -@@ -142,6 +142,13 @@ - status = "okay"; - }; - -+&clks { -+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, -+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>; -+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, -+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>; -+}; -+ - &fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>;