diff mbox series

[1/2] lib: sbi_pmu: ensure update hpm counter before starting counting

Message ID IA1PR20MB4953986E48B958892D981FBFBB11A@IA1PR20MB4953.namprd20.prod.outlook.com
State Superseded
Headers show
Series fix T-HEAD c9xx cpu softlock | expand

Commit Message

Inochi Amaoto Aug. 12, 2023, 5:06 a.m. UTC 
From: "haijiao.liu@sophgo.com" <haijiao.liu@sophgo.com>

When detecting features of PMU, the hpm counter may be written to some
value, this will cause some unexpected behavior in some cases. So ensure
the hpm counter is updated before starting the counter.

Signed-off-by: haijiao.liu@sophgo.com <haijiao.liu@sophgo.com>
---
 lib/sbi/sbi_pmu.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

Comments

Guo Ren Aug. 12, 2023, 12:05 p.m. UTC | #1 
Hi Junqiang,

Could you help test this patch series on unmatched?

On Sat, Aug 12, 2023 at 1:06 PM Inochi Amaoto <inochiama@outlook.com> wrote:
>
> From: "haijiao.liu@sophgo.com" <haijiao.liu@sophgo.com>
>
> When detecting features of PMU, the hpm counter may be written to some
> value, this will cause some unexpected behavior in some cases. So ensure
> the hpm counter is updated before starting the counter.
>
> Signed-off-by: haijiao.liu@sophgo.com <haijiao.liu@sophgo.com>
> ---
>  lib/sbi/sbi_pmu.c | 11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
> index adb9f18..f5507f2 100644
> --- a/lib/sbi/sbi_pmu.c
> +++ b/lib/sbi/sbi_pmu.c
> @@ -353,8 +353,11 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
>         if (cidx >= num_hw_ctrs || cidx == 1)
>                 return SBI_EINVAL;
>
> -       if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11)
> -               goto skip_inhibit_update;
> +       if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11) {
> +               if (ival_update)
> +                       pmu_ctr_write_hw(cidx, ival);
> +               return 0;
> +       }
>
>         /*
>          * Some of the hardware may not support mcountinhibit but perf stat
> @@ -370,12 +373,12 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
>                 pmu_ctr_enable_irq_hw(cidx);
>         if (pmu_dev && pmu_dev->hw_counter_enable_irq)
>                 pmu_dev->hw_counter_enable_irq(cidx);
> -       csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
>
> -skip_inhibit_update:
>         if (ival_update)
>                 pmu_ctr_write_hw(cidx, ival);
>
> +       csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
> +
>         return 0;
>  }
>
> --
> 2.34.1
>
diff mbox series

Patch

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index adb9f18..f5507f2 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -353,8 +353,11 @@  static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 	if (cidx >= num_hw_ctrs || cidx == 1)
 		return SBI_EINVAL;
 
-	if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11)
-		goto skip_inhibit_update;
+	if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11) {
+		if (ival_update)
+			pmu_ctr_write_hw(cidx, ival);
+		return 0;
+	}
 
 	/*
 	 * Some of the hardware may not support mcountinhibit but perf stat
@@ -370,12 +373,12 @@  static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
 		pmu_ctr_enable_irq_hw(cidx);
 	if (pmu_dev && pmu_dev->hw_counter_enable_irq)
 		pmu_dev->hw_counter_enable_irq(cidx);
-	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
 
-skip_inhibit_update:
 	if (ival_update)
 		pmu_ctr_write_hw(cidx, ival);
 
+	csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
+
 	return 0;
 }