diff mbox series

[V2,3/3] lib: sbi_pmu: keep overflow interrupt of stopped hpm counter disabled

Message ID IA1PR20MB4953344E8BB577C4EA3BDE6ABB14A@IA1PR20MB4953.namprd20.prod.outlook.com
State Accepted
Headers show
Series fix cpu softlock when using T-HEAD c9xx pmu | expand

Commit Message

Inochi Amaoto Aug. 15, 2023, 9:40 a.m. UTC 
After the hardware hpm counter is stopped, it should not raise any new
interrupt as it is already stopped. So add the hw_counter_disable_irq
callback to allow the custom pmu device to control this behavior.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
---
 lib/sbi/sbi_pmu.c | 3 +++
 1 file changed, 3 insertions(+)

--
2.41.0

Comments

Guo Ren Aug. 16, 2023, 2:48 p.m. UTC | #1 
On Tue, Aug 15, 2023 at 5:40 AM Inochi Amaoto <inochiama@outlook.com> wrote:
>
> After the hardware hpm counter is stopped, it should not raise any new
> interrupt as it is already stopped. So add the hw_counter_disable_irq
> callback to allow the custom pmu device to control this behavior.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> ---
>  lib/sbi/sbi_pmu.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
> index 2904903..b5c11bc 100644
> --- a/lib/sbi/sbi_pmu.c
> +++ b/lib/sbi/sbi_pmu.c
> @@ -482,6 +482,9 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
>         if (!__test_bit(cidx, &mctr_inhbt)) {
>                 __set_bit(cidx, &mctr_inhbt);
>                 csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
> +               if (pmu_dev && pmu_dev->hw_counter_disable_irq) {
> +                       pmu_dev->hw_counter_disable_irq(cidx);
> +               }
Thx.

Reviewed-by: Guo Ren <guoren@kernel.org>

>                 return 0;
>         } else
>                 return SBI_EALREADY_STOPPED;
> --
> 2.41.0
>
Anup Patel Sept. 6, 2023, 10:51 a.m. UTC | #2 
On Tue, Aug 15, 2023 at 3:10 PM Inochi Amaoto <inochiama@outlook.com> wrote:
>
> After the hardware hpm counter is stopped, it should not raise any new
> interrupt as it is already stopped. So add the hw_counter_disable_irq
> callback to allow the custom pmu device to control this behavior.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  lib/sbi/sbi_pmu.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
> index 2904903..b5c11bc 100644
> --- a/lib/sbi/sbi_pmu.c
> +++ b/lib/sbi/sbi_pmu.c
> @@ -482,6 +482,9 @@ static int pmu_ctr_stop_hw(uint32_t cidx)
>         if (!__test_bit(cidx, &mctr_inhbt)) {
>                 __set_bit(cidx, &mctr_inhbt);
>                 csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
> +               if (pmu_dev && pmu_dev->hw_counter_disable_irq) {
> +                       pmu_dev->hw_counter_disable_irq(cidx);
> +               }
>                 return 0;
>         } else
>                 return SBI_EALREADY_STOPPED;
> --
> 2.41.0
>
>
> --
> opensbi mailing list
> opensbi@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/opensbi
diff mbox series

Patch

diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 2904903..b5c11bc 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -482,6 +482,9 @@  static int pmu_ctr_stop_hw(uint32_t cidx)
 	if (!__test_bit(cidx, &mctr_inhbt)) {
 		__set_bit(cidx, &mctr_inhbt);
 		csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
+		if (pmu_dev && pmu_dev->hw_counter_disable_irq) {
+			pmu_dev->hw_counter_disable_irq(cidx);
+		}
 		return 0;
 	} else
 		return SBI_EALREADY_STOPPED;