| Message ID | 48463736-e6c5-05e2-8e64-cb11151542f7@yadro.com |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [linux,dev-4.7,1/2] mtd: spi-nor: fix options for mx66l51235f | expand |
On 08/15/2018 05:14 PM, Alexander Amelkin wrote: > According to AST2400 datasheet v1.4 the SPI Flash Read Timing > Setting register is at offset 0x14. There is no register at > offset 0x94 (unlike FMC controller and AST2500). ouch :/ Typo of mine. > Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> I will merge this fix in the patchset I have sent to mainline, if you don't mine. Thanks, C. > --- > drivers/mtd/spi-nor/aspeed-smc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c > index c9cd20f..9ddf24b 100644 > --- a/drivers/mtd/spi-nor/aspeed-smc.c > +++ b/drivers/mtd/spi-nor/aspeed-smc.c > @@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = { > .hastype = false, > .we0 = 0, > .ctl0 = 0x04, > - .timing = 0x94, > + .timing = 0x14, > .set_4b = aspeed_smc_chip_set_4b_spi_2400, > .optimize_read = aspeed_smc_optimize_read, > }; >
I think the mail subject should be patch linux dev-4.17, instead of dev-4.7. Tested-by: Lei YU <mine260309@gmail.com> On Wed, Aug 15, 2018 at 11:15 PM Alexander Amelkin <a.amelkin@yadro.com> wrote: > > According to AST2400 datasheet v1.4 the SPI Flash Read Timing > Setting register is at offset 0x14. There is no register at > offset 0x94 (unlike FMC controller and AST2500). > > Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com> > --- > drivers/mtd/spi-nor/aspeed-smc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c > index c9cd20f..9ddf24b 100644 > --- a/drivers/mtd/spi-nor/aspeed-smc.c > +++ b/drivers/mtd/spi-nor/aspeed-smc.c > @@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = { > .hastype = false, > .we0 = 0, > .ctl0 = 0x04, > - .timing = 0x94, > + .timing = 0x14, > .set_4b = aspeed_smc_chip_set_4b_spi_2400, > .optimize_read = aspeed_smc_optimize_read, > }; > -- > 2.7.4 > >
Yes, sure. That was a typo. 16.08.2018 06:34, Lei YU wrote: > I think the mail subject should be patch linux dev-4.17, instead of dev-4.7. > > Tested-by: Lei YU <mine260309@gmail.com> > On Wed, Aug 15, 2018 at 11:15 PM Alexander Amelkin <a.amelkin@yadro.com> wrote: >> According to AST2400 datasheet v1.4 the SPI Flash Read Timing >> Setting register is at offset 0x14. There is no register at >> offset 0x94 (unlike FMC controller and AST2500). >> >> Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com> >> --- >> drivers/mtd/spi-nor/aspeed-smc.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c >> index c9cd20f..9ddf24b 100644 >> --- a/drivers/mtd/spi-nor/aspeed-smc.c >> +++ b/drivers/mtd/spi-nor/aspeed-smc.c >> @@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = { >> .hastype = false, >> .we0 = 0, >> .ctl0 = 0x04, >> - .timing = 0x94, >> + .timing = 0x14, >> .set_4b = aspeed_smc_chip_set_4b_spi_2400, >> .optimize_read = aspeed_smc_optimize_read, >> }; >> -- >> 2.7.4 >> >>
diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c index c9cd20f..9ddf24b 100644 --- a/drivers/mtd/spi-nor/aspeed-smc.c +++ b/drivers/mtd/spi-nor/aspeed-smc.c @@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = { .hastype = false, .we0 = 0, .ctl0 = 0x04, - .timing = 0x94, + .timing = 0x14, .set_4b = aspeed_smc_chip_set_4b_spi_2400, .optimize_read = aspeed_smc_optimize_read, };
According to AST2400 datasheet v1.4 the SPI Flash Read Timing Setting register is at offset 0x14. There is no register at offset 0x94 (unlike FMC controller and AST2500). Signed-off-by: Alexander Soldatov <a.soldatov@yadro.com> --- drivers/mtd/spi-nor/aspeed-smc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)