diff mbox series

[u-boot,v2019.04-aspeed-openbmc,v7] board: ast2600: Add Inspur SCM V1 board

Message ID 20230530092444.817807-1-lintao1890@163.com
State New
Headers show
Series [u-boot,v2019.04-aspeed-openbmc,v7] board: ast2600: Add Inspur SCM V1 board | expand

Commit Message

lintao1890 May 30, 2023, 9:24 a.m. UTC 
From: Lin Tao <lintao.lc@inspur.com>

AST2600-INSPUR is an Inspur SCM V1 board which is equipped with AST2600

Signed-off-by: Lin Tao <lintao.lc@inspur.com>
---
V1 -> V2:
    - add a missing '\'
---
V2 -> V3:
    - use gpio subsystem
---
V3 -> V4:
    - fix style problems
---
V4 -> V5:
    - turn on SCM LED1
---
V5 -> V6:
    - delete unnecessary code
---
V6 -> V7:
    - submit device tree only
---
 arch/arm/dts/Makefile                    |   1 +
 arch/arm/dts/ast2600-inspur-nf5280m7.dts | 163 +++++++++++++++++++++++
 2 files changed, 164 insertions(+)
 create mode 100644 arch/arm/dts/ast2600-inspur-nf5280m7.dts
diff mbox series

Patch

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6c34b83336..9d21e58ca5 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -687,6 +687,7 @@  dtb-$(CONFIG_ARCH_ASPEED) += \
 	ast2600-dcscm.dtb \
 	ast2600-fpga.dtb \
 	ast2600-intel.dtb \
+	ast2600-inspur-nf5280m7.dtb \
 	ast2600-ncsi.dtb \
 	ast2600-p10bmc.dtb \
 	ast2600-pfr.dtb \
diff --git a/arch/arm/dts/ast2600-inspur-nf5280m7.dts b/arch/arm/dts/ast2600-inspur-nf5280m7.dts
new file mode 100644
index 0000000000..3c9200c525
--- /dev/null
+++ b/arch/arm/dts/ast2600-inspur-nf5280m7.dts
@@ -0,0 +1,163 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright 2023 Inspur Corp.
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+	model = "Inspur SCM V1";
+	compatible = "inspur,nf5280m7-bmc", "aspeed,ast2600";
+
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x40000000>;
+	};
+
+	chosen {
+		stdout-path = &uart5;
+	};
+
+	aliases {
+		mmc0 = &emmc_slot0;
+		mmc1 = &sdhci_slot0;
+		mmc2 = &sdhci_slot1;
+		spi0 = &fmc;
+		spi1 = &spi1;
+		spi2 = &spi2;
+		ethernet1 = &mac1;
+	};
+
+	cpus {
+		cpu@0 {
+			clock-frequency = <1200000000>;
+		};
+		cpu@1 {
+			clock-frequency = <1200000000>;
+		};
+	};
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart5 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sdrammc {
+	clock-frequency = <400000000>;
+};
+
+&mdio {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_mdio2_default>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	ethphy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+
+	ethphy1: ethernet-phy@1 {
+		reg = <0>;
+	};
+
+	ethphy2: ethernet-phy@2 {
+		reg = <0>;
+	};
+
+	ethphy3: ethernet-phy@3 {
+		reg = <0>;
+	};
+};
+
+&mac1 {
+	status = "okay";
+	phy-mode = "rgmii";
+	phy-handle = <&ethphy1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rgmii2_default>;
+};
+
+&fmc {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_fmcquad_default>;
+	flash@0 {
+		status = "okay";
+		spi-max-frequency = <40000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+	};
+	flash@1 {
+		status = "okay";
+		spi-max-frequency = <40000000>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	multi-master;
+};
+
+&i2c4 {
+	status = "okay";
+	multi-master;
+};
+
+&i2c5 {
+	status = "okay";
+	multi-master;
+};
+
+&i2c6 {
+	status = "okay";
+	multi-master;
+};
+
+&i2c7 {
+	status = "okay";
+	multi-master;
+};
+
+&i2c8 {
+	status = "okay";
+	multi-master;
+};
+
+&i2c9 {
+	status = "okay";
+	multi-master;
+};
+
+&i2c12 {
+	status = "okay";
+	multi-master;
+};
+
+&i2c13 {
+	status = "okay";
+	multi-master;
+};
+
+&hace {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&acry {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};