diff mbox series

[4/4] ARM: dts: aspeed-g6: Add UDMA node

Message ID 20230210072643.2772-5-chiawei_wang@aspeedtech.com
State New
Headers show
Series arm: aspeed: Add UART with DMA support | expand

Commit Message

ChiaWei Wang Feb. 10, 2023, 7:26 a.m. UTC
Add the device tree node for UART DMA controller.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
 arch/arm/boot/dts/aspeed-g6.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

ChiaWei Wang Feb. 13, 2023, 1:46 a.m. UTC | #1
> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Sent: Friday, February 10, 2023 5:14 PM
> 
> On 10/02/2023 08:26, Chia-Wei Wang wrote:
> > Add the device tree node for UART DMA controller.
> >
> > Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
> > ---
> >  arch/arm/boot/dts/aspeed-g6.dtsi | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi
> b/arch/arm/boot/dts/aspeed-g6.dtsi
> > index cc2f8b785917..3f4e9da8f6c7 100644
> > --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> > +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> > @@ -850,6 +850,13 @@ fsim1: fsi@1e79b100 {
> >  				clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
> >  				status = "disabled";
> >  			};
> > +
> > +			udma: uart-dma@1e79e000 {
> 
> Node names should be generic.
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-
> basics.html#generic-names-recommendation
> 
> > +				compatible = "aspeed,ast2600-udma";
> 
> Please run scripts/checkpatch.pl and fix reported warnings.

Thanks for reminding. Will add the dt-bindings for UDMA as well.

Regards,
Chiawei
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index cc2f8b785917..3f4e9da8f6c7 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -850,6 +850,13 @@  fsim1: fsi@1e79b100 {
 				clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
 				status = "disabled";
 			};
+
+			udma: uart-dma@1e79e000 {
+				compatible = "aspeed,ast2600-udma";
+				reg = <0x1e79e000 0x400>;
+				interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
 		};
 	};
 };