Message ID | 20220608204351.1310956-1-quic_jaehyoo@quicinc.com |
---|---|
State | New |
Headers | show |
Series | [u-boot,v2019.04-aspeed-openbmc,v4] ARM: dts: aspeed: add Qualcomm DC-SCM V1 | expand |
On Wed, 8 Jun 2022 at 20:44, Jae Hyun Yoo <quic_jaehyoo@quicinc.com> wrote: > > From: Graeme Gregory <quic_ggregory@quicinc.com> > > Add initial version of device tree for Qualcomm DC-SCM V1 BMC which is > equipped with Aspeed AST2600 BMC SoC. > > Signed-off-by: Graeme Gregory <quic_ggregory@quicinc.com> > Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Merged, thanks Jae. > --- > Changes in v4: > * Fixed typo in Makefile dtb target. > > Changes in v3: > * Dropped compatible string of flash memory - Joel / Cedric > * Dropped I2C pinctrl settings - Joel > > Changes in v2: > * Changed vendor name from Nuvia to Qualcomm. > > arch/arm/dts/Makefile | 1 + > arch/arm/dts/ast2600-qcom-dc-scm-v1.dts | 172 ++++++++++++++++++++++++ > 2 files changed, 173 insertions(+) > create mode 100644 arch/arm/dts/ast2600-qcom-dc-scm-v1.dts > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 8f876a0aa0d7..35cdd0952d33 100755 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -687,6 +687,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ > ast2600-ncsi.dtb \ > ast2600-p10bmc.dtb \ > ast2600-pfr.dtb \ > + ast2600-qcom-dc-scm-v1.dtb \ > ast2600-s6q.dtb \ > ast2600-slt.dtb \ > ast2600-tacoma.dtb > diff --git a/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts b/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts > new file mode 100644 > index 000000000000..bbfb4c7e9e0d > --- /dev/null > +++ b/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts > @@ -0,0 +1,172 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. > +/dts-v1/; > + > +#include "ast2600-u-boot.dtsi" > + > +/ { > + model = "Qualcomm DC-SCM V1 BMC"; > + compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600"; > + > + memory { > + device_type = "memory"; > + reg = <0x80000000 0x40000000>; > + }; > + > + chosen { > + stdout-path = &uart5; > + }; > + > + aliases { > + spi0 = &fmc; > + spi1 = &spi1; > + spi2 = &spi2; > + }; > + > + cpus { > + cpu@0 { > + clock-frequency = <800000000>; > + }; > + cpu@1 { > + clock-frequency = <800000000>; > + }; > + }; > +}; > + > +&uart5 { > + u-boot,dm-pre-reloc; > + status = "okay"; > +}; > + > +&sdrammc { > + clock-frequency = <400000000>; > +}; > + > +&wdt1 { > + status = "okay"; > +}; > + > +&wdt2 { > + status = "okay"; > +}; > + > +&wdt3 { > + status = "okay"; > +}; > + > +&mdio { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mdio4_default>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy3: ethernet-phy@1 { > + reg = <1>; > + }; > +}; > + > +&mac2 { > + status = "okay"; > + reg = <0x1e670000 0x180>, <0x1e650018 0x4>; > + phy-mode = "rgmii"; > + phy-handle = <ðphy3>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_rgmii3_default>; > +}; > + > +&fmc { > + status = "okay"; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fmcquad_default>; > + > + flash@0 { > + status = "okay"; > + spi-max-frequency = <133000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > + }; > + > + flash@1 { > + status = "okay"; > + spi-max-frequency = <133000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > + }; > +}; > + > +&spi1 { > + status = "okay"; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default > + &pinctrl_spi1cs1_default &pinctrl_spi1wp_default > + &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; > + > + flash@0 { > + status = "okay"; > + spi-max-frequency = <133000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > + }; > +}; > + > +&i2c4 { > + status = "okay"; > +}; > + > +&i2c5 { > + status = "okay"; > +}; > + > +&i2c6 { > + status = "okay"; > +}; > + > +&i2c7 { > + status = "okay"; > +}; > + > +&i2c8 { > + status = "okay"; > +}; > + > +&i2c9 { > + status = "okay"; > +}; > + > +&i2c10 { > + status = "okay"; > +}; > + > +&i2c12 { > + status = "okay"; > +}; > + > +&i2c13 { > + status = "okay"; > +}; > + > +&i2c14 { > + status = "okay"; > +}; > + > +&i2c15 { > + status = "okay"; > +}; > + > +&scu { > + mac0-clk-delay = <0x1d 0x1c > + 0x10 0x17 > + 0x10 0x17>; > + mac1-clk-delay = <0x1d 0x10 > + 0x10 0x10 > + 0x10 0x10>; > + mac2-clk-delay = <0x0a 0x04 > + 0x08 0x04 > + 0x08 0x04>; > + mac3-clk-delay = <0x0a 0x04 > + 0x08 0x04 > + 0x08 0x04>; > +}; > -- > 2.25.1 >
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8f876a0aa0d7..35cdd0952d33 100755 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -687,6 +687,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ ast2600-ncsi.dtb \ ast2600-p10bmc.dtb \ ast2600-pfr.dtb \ + ast2600-qcom-dc-scm-v1.dtb \ ast2600-s6q.dtb \ ast2600-slt.dtb \ ast2600-tacoma.dtb diff --git a/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts b/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts new file mode 100644 index 000000000000..bbfb4c7e9e0d --- /dev/null +++ b/arch/arm/dts/ast2600-qcom-dc-scm-v1.dts @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. +/dts-v1/; + +#include "ast2600-u-boot.dtsi" + +/ { + model = "Qualcomm DC-SCM V1 BMC"; + compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + chosen { + stdout-path = &uart5; + }; + + aliases { + spi0 = &fmc; + spi1 = &spi1; + spi2 = &spi2; + }; + + cpus { + cpu@0 { + clock-frequency = <800000000>; + }; + cpu@1 { + clock-frequency = <800000000>; + }; + }; +}; + +&uart5 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&sdrammc { + clock-frequency = <400000000>; +}; + +&wdt1 { + status = "okay"; +}; + +&wdt2 { + status = "okay"; +}; + +&wdt3 { + status = "okay"; +}; + +&mdio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio4_default>; + #address-cells = <1>; + #size-cells = <0>; + + ethphy3: ethernet-phy@1 { + reg = <1>; + }; +}; + +&mac2 { + status = "okay"; + reg = <0x1e670000 0x180>, <0x1e650018 0x4>; + phy-mode = "rgmii"; + phy-handle = <ðphy3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii3_default>; +}; + +&fmc { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fmcquad_default>; + + flash@0 { + status = "okay"; + spi-max-frequency = <133000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; + + flash@1 { + status = "okay"; + spi-max-frequency = <133000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&spi1 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default + &pinctrl_spi1cs1_default &pinctrl_spi1wp_default + &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; + + flash@0 { + status = "okay"; + spi-max-frequency = <133000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c10 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; +}; + +&i2c14 { + status = "okay"; +}; + +&i2c15 { + status = "okay"; +}; + +&scu { + mac0-clk-delay = <0x1d 0x1c + 0x10 0x17 + 0x10 0x17>; + mac1-clk-delay = <0x1d 0x10 + 0x10 0x10 + 0x10 0x10>; + mac2-clk-delay = <0x0a 0x04 + 0x08 0x04 + 0x08 0x04>; + mac3-clk-delay = <0x0a 0x04 + 0x08 0x04 + 0x08 0x04>; +};