| Message ID | 20201211170704.27640-1-eajames@linux.ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [linux,dev-5.8] ARM: dts: Aspeed: Add Everest BMC machine | expand |
> On Dec 11, 2020, at 11:07 AM, Eddie James <eajames@linux.ibm.com> wrote: > > Add the Everest machine powered by an AST2600 chip. Copy the basic > configuration from Rainier. > > Signed-off-by: Eddie James <eajames@linux.ibm.com> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 775 +++++++++++++++++++ > 2 files changed, 776 insertions(+) > create mode 100644 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 5fd12e8909d3..c13ac1bf7216 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -1360,6 +1360,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ > aspeed-bmc-facebook-wedge100.dtb \ > aspeed-bmc-facebook-yamp.dtb \ > aspeed-bmc-facebook-yosemitev2.dtb \ > + aspeed-bmc-ibm-everest.dtb \ > aspeed-bmc-ibm-rainier.dtb \ > aspeed-bmc-ibm-rainier-4u.dtb \ > aspeed-bmc-intel-s2600wf.dtb \ > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts > new file mode 100644 > index 000000000000..6bd876657bb8 > --- /dev/null > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts > @@ -0,0 +1,775 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +// Copyright 2020 IBM Corp. > +/dts-v1/; > + > +#include "aspeed-g6.dtsi" > +#include <dt-bindings/gpio/aspeed-gpio.h> > +#include <dt-bindings/i2c/i2c.h> > +#include <dt-bindings/leds/leds-pca955x.h> > + > +/ { > + model = "Everest"; > + compatible = "ibm,everest-bmc", "aspeed,ast2600"; > + > + aliases { > + i2c100 = &cfam0_i2c0; > + i2c101 = &cfam0_i2c1; > + i2c110 = &cfam0_i2c10; > + i2c111 = &cfam0_i2c11; > + i2c112 = &cfam0_i2c12; > + i2c113 = &cfam0_i2c13; > + i2c114 = &cfam0_i2c14; > + i2c115 = &cfam0_i2c15; > + i2c202 = &cfam1_i2c2; > + i2c203 = &cfam1_i2c3; > + i2c210 = &cfam1_i2c10; > + i2c211 = &cfam1_i2c11; > + i2c214 = &cfam1_i2c14; > + i2c215 = &cfam1_i2c15; > + i2c216 = &cfam1_i2c16; > + i2c217 = &cfam1_i2c17; > + i2c300 = &cfam2_i2c0; > + i2c301 = &cfam2_i2c1; > + i2c310 = &cfam2_i2c10; > + i2c311 = &cfam2_i2c11; > + i2c312 = &cfam2_i2c12; > + i2c313 = &cfam2_i2c13; > + i2c314 = &cfam2_i2c14; > + i2c315 = &cfam2_i2c15; > + i2c402 = &cfam3_i2c2; > + i2c403 = &cfam3_i2c3; > + i2c410 = &cfam3_i2c10; > + i2c411 = &cfam3_i2c11; > + i2c414 = &cfam3_i2c14; > + i2c415 = &cfam3_i2c15; > + i2c416 = &cfam3_i2c16; > + i2c417 = &cfam3_i2c17; > + > + serial4 = &uart5; > + > + spi10 = &cfam0_spi0; > + spi11 = &cfam0_spi1; > + spi12 = &cfam0_spi2; > + spi13 = &cfam0_spi3; > + spi20 = &cfam1_spi0; > + spi21 = &cfam1_spi1; > + spi22 = &cfam1_spi2; > + spi23 = &cfam1_spi3; > + spi30 = &cfam2_spi0; > + spi31 = &cfam2_spi1; > + spi32 = &cfam2_spi2; > + spi33 = &cfam2_spi3; > + spi40 = &cfam3_spi0; > + spi41 = &cfam3_spi1; > + spi42 = &cfam3_spi2; > + spi43 = &cfam3_spi3; > + }; > + > + chosen { > + stdout-path = &uart5; > + bootargs = "console=ttyS4,115200n8"; > + }; > + > + memory@80000000 { > + device_type = "memory"; > + reg = <0x80000000 0x40000000>; > + }; > + > + reserved-memory { > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + /* LPC FW cycle bridge region requires natural alignment */ > + flash_memory: region@b8000000 { > + no-map; > + reg = <0xb8000000 0x04000000>; /* 64M */ > + }; > + > + /* 48MB region from the end of flash to start of vga memory */ > + ramoops@bc000000 { > + compatible = "ramoops"; > + reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */ > + record-size = <0x8000>; > + console-size = <0x8000>; > + pmsg-size = <0x8000>; > + max-reason = <3>; /* KMSG_DUMP_EMERG */ > + }; > + > + /* VGA region is dictated by hardware strapping */ > + vga_memory: region@bf000000 { > + no-map; > + compatible = "shared-dma-pool"; > + reg = <0xbf000000 0x01000000>; /* 16M */ > + }; > + }; > +}; > + > +&ehci1 { > + status = "okay"; > +}; > + > +&emmc_controller { > + status = "okay"; > +}; > + > +&pinctrl_emmc_default { > + bias-disable; > +}; > + > +&emmc { > + status = "okay"; > +}; > + > +&fsim0 { > + status = "okay"; > + > + #address-cells = <2>; > + #size-cells = <0>; > + > + /* > + * CFAM Reset is supposed to be active low but pass1 hardware is wired > + * active high. > + */ > + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; > + > + cfam@0,0 { > + reg = <0 0>; > + #address-cells = <1>; > + #size-cells = <1>; > + chip-id = <0>; > + > + scom@1000 { > + compatible = "ibm,fsi2pib"; > + reg = <0x1000 0x400>; > + }; > + > + i2c@1800 { > + compatible = "ibm,fsi-i2c-master"; > + reg = <0x1800 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + cfam0_i2c0: i2c-bus@0 { > + reg = <0>; /* OMI01 */ > + }; > + > + cfam0_i2c1: i2c-bus@1 { > + reg = <1>; /* OMI23 */ > + }; > + > + cfam0_i2c10: i2c-bus@a { > + reg = <10>; /* OP3A */ > + }; > + > + cfam0_i2c11: i2c-bus@b { > + reg = <11>; /* OP3B */ > + }; > + > + cfam0_i2c12: i2c-bus@c { > + reg = <12>; /* OP4A */ > + }; > + > + cfam0_i2c13: i2c-bus@d { > + reg = <13>; /* OP4B */ > + }; > + > + cfam0_i2c14: i2c-bus@e { > + reg = <14>; /* OP5A */ > + }; > + > + cfam0_i2c15: i2c-bus@f { > + reg = <15>; /* OP5B */ > + }; > + }; > + > + fsi2spi@1c00 { > + compatible = "ibm,fsi2spi"; > + reg = <0x1c00 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + cfam0_spi0: spi@0 { > + reg = <0x0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam0_spi1: spi@20 { > + reg = <0x20>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam0_spi2: spi@40 { > + reg = <0x40>; > + compatible = "ibm,fsi2spi-restricted"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam0_spi3: spi@60 { > + reg = <0x60>; > + compatible = "ibm,fsi2spi-restricted"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + }; > + > + sbefifo@2400 { > + compatible = "ibm,p9-sbefifo"; > + reg = <0x2400 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + fsi_occ0: occ { > + compatible = "ibm,p10-occ"; > + }; > + }; > + > + fsi_hub0: hub@3400 { > + compatible = "fsi-master-hub"; > + reg = <0x3400 0x400>; > + #address-cells = <2>; > + #size-cells = <0>; > + }; > + }; > +}; > + > +&fsi_hub0 { > + cfam@1,0 { > + reg = <1 0>; > + #address-cells = <1>; > + #size-cells = <1>; > + chip-id = <1>; > + > + scom@1000 { > + compatible = "ibm,fsi2pib"; > + reg = <0x1000 0x400>; > + }; > + > + i2c@1800 { > + compatible = "ibm,fsi-i2c-master"; > + reg = <0x1800 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + cfam1_i2c2: i2c-bus@2 { > + reg = <2>; /* OMI45 */ > + }; > + > + cfam1_i2c3: i2c-bus@3 { > + reg = <3>; /* OMI67 */ > + }; > + > + cfam1_i2c10: i2c-bus@a { > + reg = <10>; /* OP3A */ > + }; > + > + cfam1_i2c11: i2c-bus@b { > + reg = <11>; /* OP3B */ > + }; > + > + cfam1_i2c14: i2c-bus@e { > + reg = <14>; /* OP5A */ > + }; > + > + cfam1_i2c15: i2c-bus@f { > + reg = <15>; /* OP5B */ > + }; > + > + cfam1_i2c16: i2c-bus@10 { > + reg = <16>; /* OP6A */ > + }; > + > + cfam1_i2c17: i2c-bus@11 { > + reg = <17>; /* OP6B */ > + }; > + }; > + > + fsi2spi@1c00 { > + compatible = "ibm,fsi2spi"; > + reg = <0x1c00 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + cfam1_spi0: spi@0 { > + reg = <0x0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam1_spi1: spi@20 { > + reg = <0x20>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam1_spi2: spi@40 { > + reg = <0x40>; > + compatible = "ibm,fsi2spi-restricted"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam1_spi3: spi@60 { > + reg = <0x60>; > + compatible = "ibm,fsi2spi-restricted"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + }; > + > + sbefifo@2400 { > + compatible = "ibm,p9-sbefifo"; > + reg = <0x2400 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + fsi_occ1: occ { > + compatible = "ibm,p10-occ"; > + }; > + }; > + > + fsi_hub1: hub@3400 { > + compatible = "fsi-master-hub"; > + reg = <0x3400 0x400>; > + #address-cells = <2>; > + #size-cells = <0>; > + > + no-scan-on-init; > + }; > + }; > + > + cfam@2,0 { > + reg = <2 0>; > + #address-cells = <1>; > + #size-cells = <1>; > + chip-id = <2>; > + > + scom@1000 { > + compatible = "ibm,fsi2pib"; > + reg = <0x1000 0x400>; > + }; > + > + i2c@1800 { > + compatible = "ibm,fsi-i2c-master"; > + reg = <0x1800 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + cfam2_i2c0: i2c-bus@0 { > + reg = <0>; /* OM01 */ > + }; > + > + cfam2_i2c1: i2c-bus@1 { > + reg = <1>; /* OM23 */ > + }; > + > + cfam2_i2c10: i2c-bus@a { > + reg = <10>; /* OP3A */ > + }; > + > + cfam2_i2c11: i2c-bus@b { > + reg = <11>; /* OP3B */ > + }; > + > + cfam2_i2c12: i2c-bus@c { > + reg = <12>; /* OP4A */ > + }; > + > + cfam2_i2c13: i2c-bus@d { > + reg = <13>; /* OP4B */ > + }; > + > + cfam2_i2c14: i2c-bus@e { > + reg = <14>; /* OP5A */ > + }; > + > + cfam2_i2c15: i2c-bus@f { > + reg = <15>; /* OP5B */ > + }; > + }; > + > + fsi2spi@1c00 { > + compatible = "ibm,fsi2spi"; > + reg = <0x1c00 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + cfam2_spi0: spi@0 { > + reg = <0x0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam2_spi1: spi@20 { > + reg = <0x20>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam2_spi2: spi@40 { > + reg = <0x40>; > + compatible = "ibm,fsi2spi-restricted"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam2_spi3: spi@60 { > + reg = <0x60>; > + compatible = "ibm,fsi2spi-restricted"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + }; > + > + sbefifo@2400 { > + compatible = "ibm,p9-sbefifo"; > + reg = <0x2400 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + fsi_occ2: occ { > + compatible = "ibm,p10-occ"; > + }; > + }; > + > + fsi_hub2: hub@3400 { > + compatible = "fsi-master-hub"; > + reg = <0x3400 0x400>; > + #address-cells = <2>; > + #size-cells = <0>; > + > + no-scan-on-init; > + }; > + }; > + > + cfam@3,0 { > + reg = <3 0>; > + #address-cells = <1>; > + #size-cells = <1>; > + chip-id = <3>; > + > + scom@1000 { > + compatible = "ibm,fsi2pib"; > + reg = <0x1000 0x400>; > + }; > + > + i2c@1800 { > + compatible = "ibm,fsi-i2c-master"; > + reg = <0x1800 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + cfam3_i2c2: i2c-bus@2 { > + reg = <2>; /* OM45 */ > + }; > + > + cfam3_i2c3: i2c-bus@3 { > + reg = <3>; /* OM67 */ > + }; > + > + cfam3_i2c10: i2c-bus@a { > + reg = <10>; /* OP3A */ > + }; > + > + cfam3_i2c11: i2c-bus@b { > + reg = <11>; /* OP3B */ > + }; > + > + cfam3_i2c14: i2c-bus@e { > + reg = <14>; /* OP5A */ > + }; > + > + cfam3_i2c15: i2c-bus@f { > + reg = <15>; /* OP5B */ > + }; > + > + cfam3_i2c16: i2c-bus@10 { > + reg = <16>; /* OP6A */ > + }; > + > + cfam3_i2c17: i2c-bus@11 { > + reg = <17>; /* OP6B */ > + }; > + }; > + > + fsi2spi@1c00 { > + compatible = "ibm,fsi2spi"; > + reg = <0x1c00 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + cfam3_spi0: spi@0 { > + reg = <0x0>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam3_spi1: spi@20 { > + reg = <0x20>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam3_spi2: spi@40 { > + reg = <0x40>; > + compatible = "ibm,fsi2spi-restricted"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + > + cfam3_spi3: spi@60 { > + reg = <0x60>; > + compatible = "ibm,fsi2spi-restricted"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@0 { > + at25,byte-len = <0x80000>; > + at25,addr-mode = <4>; > + at25,page-size = <256>; > + > + compatible = "atmel,at25"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + }; > + }; > + }; > + > + sbefifo@2400 { > + compatible = "ibm,p9-sbefifo"; > + reg = <0x2400 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + fsi_occ3: occ { > + compatible = "ibm,p10-occ"; > + }; > + }; > + > + fsi_hub3: hub@3400 { > + compatible = "fsi-master-hub"; > + reg = <0x3400 0x400>; > + #address-cells = <2>; > + #size-cells = <0>; > + > + no-scan-on-init; > + }; > + }; > +}; > + > +/* Legacy OCC numbering (to get rid of when userspace is fixed) */ > +&fsi_occ0 { > + reg = <1>; > +}; > + > +&fsi_occ1 { > + reg = <2>; > +}; > + > +&fsi_occ2 { > + reg = <3>; > +}; > + > +&fsi_occ3 { > + reg = <4>; > +}; > + > +&ibt { > + status = "okay"; > +}; > + > +&vuart1 { > + status = "okay"; > +}; > + > +&vuart2 { > + status = "okay"; > +}; > + > +&lpc_ctrl { > + status = "okay"; > + memory-region = <&flash_memory>; > +}; > + > +&kcs4 { > + compatible = "openbmc,mctp-lpc"; > + status = "okay"; > +}; > + > +&mac2 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_rmii3_default>; > + clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, > + <&syscon ASPEED_CLK_MAC3RCLK>; > + clock-names = "MACCLK", "RCLK"; > + use-ncsi; > +}; > + > +&mac3 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_rmii4_default>; > + clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, > + <&syscon ASPEED_CLK_MAC4RCLK>; > + clock-names = "MACCLK", "RCLK"; > + use-ncsi; > +}; > + > +&xdma { > + status = "okay"; > + memory-region = <&vga_memory>; > +}; > -- > 2.18.4 Thanks Eddie, this is a good base to start with. I’ve tested out in our simulation. Tested-by: Andrew Geissler <geissonator@gmail.com>
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5fd12e8909d3..c13ac1bf7216 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1360,6 +1360,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-facebook-wedge100.dtb \ aspeed-bmc-facebook-yamp.dtb \ aspeed-bmc-facebook-yosemitev2.dtb \ + aspeed-bmc-ibm-everest.dtb \ aspeed-bmc-ibm-rainier.dtb \ aspeed-bmc-ibm-rainier-4u.dtb \ aspeed-bmc-intel-s2600wf.dtb \ diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts new file mode 100644 index 000000000000..6bd876657bb8 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts @@ -0,0 +1,775 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2020 IBM Corp. +/dts-v1/; + +#include "aspeed-g6.dtsi" +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/i2c/i2c.h> +#include <dt-bindings/leds/leds-pca955x.h> + +/ { + model = "Everest"; + compatible = "ibm,everest-bmc", "aspeed,ast2600"; + + aliases { + i2c100 = &cfam0_i2c0; + i2c101 = &cfam0_i2c1; + i2c110 = &cfam0_i2c10; + i2c111 = &cfam0_i2c11; + i2c112 = &cfam0_i2c12; + i2c113 = &cfam0_i2c13; + i2c114 = &cfam0_i2c14; + i2c115 = &cfam0_i2c15; + i2c202 = &cfam1_i2c2; + i2c203 = &cfam1_i2c3; + i2c210 = &cfam1_i2c10; + i2c211 = &cfam1_i2c11; + i2c214 = &cfam1_i2c14; + i2c215 = &cfam1_i2c15; + i2c216 = &cfam1_i2c16; + i2c217 = &cfam1_i2c17; + i2c300 = &cfam2_i2c0; + i2c301 = &cfam2_i2c1; + i2c310 = &cfam2_i2c10; + i2c311 = &cfam2_i2c11; + i2c312 = &cfam2_i2c12; + i2c313 = &cfam2_i2c13; + i2c314 = &cfam2_i2c14; + i2c315 = &cfam2_i2c15; + i2c402 = &cfam3_i2c2; + i2c403 = &cfam3_i2c3; + i2c410 = &cfam3_i2c10; + i2c411 = &cfam3_i2c11; + i2c414 = &cfam3_i2c14; + i2c415 = &cfam3_i2c15; + i2c416 = &cfam3_i2c16; + i2c417 = &cfam3_i2c17; + + serial4 = &uart5; + + spi10 = &cfam0_spi0; + spi11 = &cfam0_spi1; + spi12 = &cfam0_spi2; + spi13 = &cfam0_spi3; + spi20 = &cfam1_spi0; + spi21 = &cfam1_spi1; + spi22 = &cfam1_spi2; + spi23 = &cfam1_spi3; + spi30 = &cfam2_spi0; + spi31 = &cfam2_spi1; + spi32 = &cfam2_spi2; + spi33 = &cfam2_spi3; + spi40 = &cfam3_spi0; + spi41 = &cfam3_spi1; + spi42 = &cfam3_spi2; + spi43 = &cfam3_spi3; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200n8"; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* LPC FW cycle bridge region requires natural alignment */ + flash_memory: region@b8000000 { + no-map; + reg = <0xb8000000 0x04000000>; /* 64M */ + }; + + /* 48MB region from the end of flash to start of vga memory */ + ramoops@bc000000 { + compatible = "ramoops"; + reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */ + record-size = <0x8000>; + console-size = <0x8000>; + pmsg-size = <0x8000>; + max-reason = <3>; /* KMSG_DUMP_EMERG */ + }; + + /* VGA region is dictated by hardware strapping */ + vga_memory: region@bf000000 { + no-map; + compatible = "shared-dma-pool"; + reg = <0xbf000000 0x01000000>; /* 16M */ + }; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&emmc_controller { + status = "okay"; +}; + +&pinctrl_emmc_default { + bias-disable; +}; + +&emmc { + status = "okay"; +}; + +&fsim0 { + status = "okay"; + + #address-cells = <2>; + #size-cells = <0>; + + /* + * CFAM Reset is supposed to be active low but pass1 hardware is wired + * active high. + */ + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; + + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <0>; + + scom@1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c@1800 { + compatible = "ibm,fsi-i2c-master"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam0_i2c0: i2c-bus@0 { + reg = <0>; /* OMI01 */ + }; + + cfam0_i2c1: i2c-bus@1 { + reg = <1>; /* OMI23 */ + }; + + cfam0_i2c10: i2c-bus@a { + reg = <10>; /* OP3A */ + }; + + cfam0_i2c11: i2c-bus@b { + reg = <11>; /* OP3B */ + }; + + cfam0_i2c12: i2c-bus@c { + reg = <12>; /* OP4A */ + }; + + cfam0_i2c13: i2c-bus@d { + reg = <13>; /* OP4B */ + }; + + cfam0_i2c14: i2c-bus@e { + reg = <14>; /* OP5A */ + }; + + cfam0_i2c15: i2c-bus@f { + reg = <15>; /* OP5B */ + }; + }; + + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam0_spi0: spi@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi1: spi@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi2: spi@40 { + reg = <0x40>; + compatible = "ibm,fsi2spi-restricted"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam0_spi3: spi@60 { + reg = <0x60>; + compatible = "ibm,fsi2spi-restricted"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ0: occ { + compatible = "ibm,p10-occ"; + }; + }; + + fsi_hub0: hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + }; + }; +}; + +&fsi_hub0 { + cfam@1,0 { + reg = <1 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <1>; + + scom@1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c@1800 { + compatible = "ibm,fsi-i2c-master"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam1_i2c2: i2c-bus@2 { + reg = <2>; /* OMI45 */ + }; + + cfam1_i2c3: i2c-bus@3 { + reg = <3>; /* OMI67 */ + }; + + cfam1_i2c10: i2c-bus@a { + reg = <10>; /* OP3A */ + }; + + cfam1_i2c11: i2c-bus@b { + reg = <11>; /* OP3B */ + }; + + cfam1_i2c14: i2c-bus@e { + reg = <14>; /* OP5A */ + }; + + cfam1_i2c15: i2c-bus@f { + reg = <15>; /* OP5B */ + }; + + cfam1_i2c16: i2c-bus@10 { + reg = <16>; /* OP6A */ + }; + + cfam1_i2c17: i2c-bus@11 { + reg = <17>; /* OP6B */ + }; + }; + + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam1_spi0: spi@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi1: spi@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi2: spi@40 { + reg = <0x40>; + compatible = "ibm,fsi2spi-restricted"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam1_spi3: spi@60 { + reg = <0x60>; + compatible = "ibm,fsi2spi-restricted"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ1: occ { + compatible = "ibm,p10-occ"; + }; + }; + + fsi_hub1: hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; + + cfam@2,0 { + reg = <2 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <2>; + + scom@1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c@1800 { + compatible = "ibm,fsi-i2c-master"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam2_i2c0: i2c-bus@0 { + reg = <0>; /* OM01 */ + }; + + cfam2_i2c1: i2c-bus@1 { + reg = <1>; /* OM23 */ + }; + + cfam2_i2c10: i2c-bus@a { + reg = <10>; /* OP3A */ + }; + + cfam2_i2c11: i2c-bus@b { + reg = <11>; /* OP3B */ + }; + + cfam2_i2c12: i2c-bus@c { + reg = <12>; /* OP4A */ + }; + + cfam2_i2c13: i2c-bus@d { + reg = <13>; /* OP4B */ + }; + + cfam2_i2c14: i2c-bus@e { + reg = <14>; /* OP5A */ + }; + + cfam2_i2c15: i2c-bus@f { + reg = <15>; /* OP5B */ + }; + }; + + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam2_spi0: spi@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi1: spi@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi2: spi@40 { + reg = <0x40>; + compatible = "ibm,fsi2spi-restricted"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam2_spi3: spi@60 { + reg = <0x60>; + compatible = "ibm,fsi2spi-restricted"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ2: occ { + compatible = "ibm,p10-occ"; + }; + }; + + fsi_hub2: hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; + + cfam@3,0 { + reg = <3 0>; + #address-cells = <1>; + #size-cells = <1>; + chip-id = <3>; + + scom@1000 { + compatible = "ibm,fsi2pib"; + reg = <0x1000 0x400>; + }; + + i2c@1800 { + compatible = "ibm,fsi-i2c-master"; + reg = <0x1800 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam3_i2c2: i2c-bus@2 { + reg = <2>; /* OM45 */ + }; + + cfam3_i2c3: i2c-bus@3 { + reg = <3>; /* OM67 */ + }; + + cfam3_i2c10: i2c-bus@a { + reg = <10>; /* OP3A */ + }; + + cfam3_i2c11: i2c-bus@b { + reg = <11>; /* OP3B */ + }; + + cfam3_i2c14: i2c-bus@e { + reg = <14>; /* OP5A */ + }; + + cfam3_i2c15: i2c-bus@f { + reg = <15>; /* OP5B */ + }; + + cfam3_i2c16: i2c-bus@10 { + reg = <16>; /* OP6A */ + }; + + cfam3_i2c17: i2c-bus@11 { + reg = <17>; /* OP6B */ + }; + }; + + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + cfam3_spi0: spi@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi1: spi@20 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi2: spi@40 { + reg = <0x40>; + compatible = "ibm,fsi2spi-restricted"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + + cfam3_spi3: spi@60 { + reg = <0x60>; + compatible = "ibm,fsi2spi-restricted"; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + at25,byte-len = <0x80000>; + at25,addr-mode = <4>; + at25,page-size = <256>; + + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + fsi_occ3: occ { + compatible = "ibm,p10-occ"; + }; + }; + + fsi_hub3: hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + no-scan-on-init; + }; + }; +}; + +/* Legacy OCC numbering (to get rid of when userspace is fixed) */ +&fsi_occ0 { + reg = <1>; +}; + +&fsi_occ1 { + reg = <2>; +}; + +&fsi_occ2 { + reg = <3>; +}; + +&fsi_occ3 { + reg = <4>; +}; + +&ibt { + status = "okay"; +}; + +&vuart1 { + status = "okay"; +}; + +&vuart2 { + status = "okay"; +}; + +&lpc_ctrl { + status = "okay"; + memory-region = <&flash_memory>; +}; + +&kcs4 { + compatible = "openbmc,mctp-lpc"; + status = "okay"; +}; + +&mac2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii3_default>; + clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, + <&syscon ASPEED_CLK_MAC3RCLK>; + clock-names = "MACCLK", "RCLK"; + use-ncsi; +}; + +&mac3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii4_default>; + clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, + <&syscon ASPEED_CLK_MAC4RCLK>; + clock-names = "MACCLK", "RCLK"; + use-ncsi; +}; + +&xdma { + status = "okay"; + memory-region = <&vga_memory>; +};
Add the Everest machine powered by an AST2600 chip. Copy the basic configuration from Rainier. Signed-off-by: Eddie James <eajames@linux.ibm.com> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 775 +++++++++++++++++++ 2 files changed, 776 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts