Message ID | 20180712061742.10283-1-joel@jms.id.au |
---|---|
State | Accepted, archived |
Headers | show |
Series | [linux,dev-4.17] ARM: dts: aspeed-g4: Expose SuperIO scratch registers | expand |
On Thu, 12 Jul 2018, at 15:47, Joel Stanley wrote: > Signed-off-by: Joel Stanley <joel@jms.id.au> I'm breaking this with what I'm proposing upstream, but we'll work around that given the g5 already has this gunk. Acked-by: Andrew Jeffery <andrew@aj.id.au> > --- > arch/arm/boot/dts/aspeed-g4.dtsi | 87 ++++++++++++++++++++++++++++++++ > 1 file changed, 87 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi > index e86fa80712e5..6af12872ee74 100644 > --- a/arch/arm/boot/dts/aspeed-g4.dtsi > +++ b/arch/arm/boot/dts/aspeed-g4.dtsi > @@ -316,6 +316,10 @@ > interrupts = <8>; > }; > > + sio_regs: regs { > + compatible = "aspeed,bmc-misc"; > + }; > + > mbox: mbox@180 { > compatible = "aspeed,ast2400-mbox"; > reg = <0x180 0x5c>; > @@ -1366,3 +1370,86 @@ > groups = "WDTRST2"; > }; > }; > + > +&sio_regs { > + sio_2b { > + offset = <0xf0>; > + bit-mask = <0xff>; > + bit-shift = <24>; > + }; > + sio_2a { > + offset = <0xf0>; > + bit-mask = <0xff>; > + bit-shift = <16>; > + }; > + sio_29 { > + offset = <0xf0>; > + bit-mask = <0xff>; > + bit-shift = <8>; > + }; > + sio_28 { > + offset = <0xf0>; > + bit-mask = <0xff>; > + bit-shift = <0>; > + }; > + sio_2f { > + offset = <0xf4>; > + bit-mask = <0xff>; > + bit-shift = <24>; > + }; > + sio_2e { > + offset = <0xf4>; > + bit-mask = <0xff>; > + bit-shift = <16>; > + }; > + sio_2d { > + offset = <0xf4>; > + bit-mask = <0xff>; > + bit-shift = <8>; > + }; > + sio_2c { > + offset = <0xf4>; > + bit-mask = <0xff>; > + bit-shift = <0>; > + }; > + sio_23 { > + offset = <0xf8>; > + bit-mask = <0xff>; > + bit-shift = <24>; > + }; > + sio_22 { > + offset = <0xf8>; > + bit-mask = <0xff>; > + bit-shift = <16>; > + }; > + sio_21 { > + offset = <0xf8>; > + bit-mask = <0xff>; > + bit-shift = <8>; > + }; > + sio_20 { > + offset = <0xf8>; > + bit-mask = <0xff>; > + bit-shift = <0>; > + }; > + sio_27 { > + offset = <0xfc>; > + bit-mask = <0xff>; > + bit-shift = <24>; > + }; > + sio_26 { > + offset = <0xfc>; > + bit-mask = <0xff>; > + bit-shift = <16>; > + }; > + sio_25 { > + offset = <0xfc>; > + bit-mask = <0xff>; > + bit-shift = <8>; > + }; > + sio_24 { > + offset = <0xfc>; > + bit-mask = <0xff>; > + bit-shift = <0>; > + }; > +}; > -- > 2.17.1 >
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index e86fa80712e5..6af12872ee74 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -316,6 +316,10 @@ interrupts = <8>; }; + sio_regs: regs { + compatible = "aspeed,bmc-misc"; + }; + mbox: mbox@180 { compatible = "aspeed,ast2400-mbox"; reg = <0x180 0x5c>; @@ -1366,3 +1370,86 @@ groups = "WDTRST2"; }; }; + +&sio_regs { + sio_2b { + offset = <0xf0>; + bit-mask = <0xff>; + bit-shift = <24>; + }; + sio_2a { + offset = <0xf0>; + bit-mask = <0xff>; + bit-shift = <16>; + }; + sio_29 { + offset = <0xf0>; + bit-mask = <0xff>; + bit-shift = <8>; + }; + sio_28 { + offset = <0xf0>; + bit-mask = <0xff>; + bit-shift = <0>; + }; + sio_2f { + offset = <0xf4>; + bit-mask = <0xff>; + bit-shift = <24>; + }; + sio_2e { + offset = <0xf4>; + bit-mask = <0xff>; + bit-shift = <16>; + }; + sio_2d { + offset = <0xf4>; + bit-mask = <0xff>; + bit-shift = <8>; + }; + sio_2c { + offset = <0xf4>; + bit-mask = <0xff>; + bit-shift = <0>; + }; + sio_23 { + offset = <0xf8>; + bit-mask = <0xff>; + bit-shift = <24>; + }; + sio_22 { + offset = <0xf8>; + bit-mask = <0xff>; + bit-shift = <16>; + }; + sio_21 { + offset = <0xf8>; + bit-mask = <0xff>; + bit-shift = <8>; + }; + sio_20 { + offset = <0xf8>; + bit-mask = <0xff>; + bit-shift = <0>; + }; + sio_27 { + offset = <0xfc>; + bit-mask = <0xff>; + bit-shift = <24>; + }; + sio_26 { + offset = <0xfc>; + bit-mask = <0xff>; + bit-shift = <16>; + }; + sio_25 { + offset = <0xfc>; + bit-mask = <0xff>; + bit-shift = <8>; + }; + sio_24 { + offset = <0xfc>; + bit-mask = <0xff>; + bit-shift = <0>; + }; +};
Signed-off-by: Joel Stanley <joel@jms.id.au> --- arch/arm/boot/dts/aspeed-g4.dtsi | 87 ++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+)