| Message ID | 20170315212550.65964-1-cbostic@linux.vnet.ibm.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
On Wed, Mar 15, 2017 at 4:25 PM, Christopher Bostic <cbostic@linux.vnet.ibm.com> wrote: > Under high work loads the ARM core can occasionaly hit invalid > timings between the FSI clock and data lines which leads to > data crc errors. Add further delay between clock switch and > data line changes. > > Signed-off-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> > --- > drivers/fsi/fsi-master-gpio.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/fsi/fsi-master-gpio.c b/drivers/fsi/fsi-master-gpio.c > index a8976d5..a93453f 100644 > --- a/drivers/fsi/fsi-master-gpio.c > +++ b/drivers/fsi/fsi-master-gpio.c > @@ -13,7 +13,7 @@ > > #include "fsi-master.h" > > -#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */ > +#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in uS */ > #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */ > #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */ > #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */ > @@ -86,9 +86,9 @@ static void clock_toggle(struct fsi_master_gpio *master, int count) > int i; > > for (i = 0; i < count; i++) { > - ndelay(FSI_GPIO_STD_DLY); > + udelay(FSI_GPIO_STD_DLY); > gpiod_set_value(master->gpio_clk, 0); > - ndelay(FSI_GPIO_STD_DLY); > + udelay(FSI_GPIO_STD_DLY); > gpiod_set_value(master->gpio_clk, 1); > } > } > @@ -97,7 +97,7 @@ static int sda_in(struct fsi_master_gpio *master) > { > int in; > > - ndelay(FSI_GPIO_STD_DLY); > + udelay(FSI_GPIO_STD_DLY); > in = gpiod_get_value(master->gpio_data); > return in ? 1 : 0; > } > -- > 1.8.2.2 > Acked-by: Andrew Geissler <geissonator@gmail.com>
Hi Chris > On Mar 15, 2017, at 5:25 PM, Christopher Bostic <cbostic@linux.vnet.ibm.com> wrote: > > Under high work loads the ARM core can occasionaly hit invalid > timings between the FSI clock and data lines which leads to > data crc errors. Add further delay between clock switch and > data line changes. > > Signed-off-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> > --- > drivers/fsi/fsi-master-gpio.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/fsi/fsi-master-gpio.c b/drivers/fsi/fsi-master-gpio.c > index a8976d5..a93453f 100644 > --- a/drivers/fsi/fsi-master-gpio.c > +++ b/drivers/fsi/fsi-master-gpio.c > @@ -13,7 +13,7 @@ > > #include "fsi-master.h" > > -#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */ > +#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in uS */ How did you arrive at 1000x ? Does this mean we spend 1000x spinning the core when sending data out? I wonder if 100x or even 10x might still get rid of enough of the jitter? > #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */ > #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */ > #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */ > @@ -86,9 +86,9 @@ static void clock_toggle(struct fsi_master_gpio *master, int count) > int i; > > for (i = 0; i < count; i++) { > - ndelay(FSI_GPIO_STD_DLY); > + udelay(FSI_GPIO_STD_DLY); > gpiod_set_value(master->gpio_clk, 0); > - ndelay(FSI_GPIO_STD_DLY); > + udelay(FSI_GPIO_STD_DLY); > gpiod_set_value(master->gpio_clk, 1); > } > } > @@ -97,7 +97,7 @@ static int sda_in(struct fsi_master_gpio *master) > { > int in; > > - ndelay(FSI_GPIO_STD_DLY); > + udelay(FSI_GPIO_STD_DLY); > in = gpiod_get_value(master->gpio_data); > return in ? 1 : 0; > } > -- > 1.8.2.2 thx - brad
diff --git a/drivers/fsi/fsi-master-gpio.c b/drivers/fsi/fsi-master-gpio.c index a8976d5..a93453f 100644 --- a/drivers/fsi/fsi-master-gpio.c +++ b/drivers/fsi/fsi-master-gpio.c @@ -13,7 +13,7 @@ #include "fsi-master.h" -#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */ +#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in uS */ #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */ #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */ #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */ @@ -86,9 +86,9 @@ static void clock_toggle(struct fsi_master_gpio *master, int count) int i; for (i = 0; i < count; i++) { - ndelay(FSI_GPIO_STD_DLY); + udelay(FSI_GPIO_STD_DLY); gpiod_set_value(master->gpio_clk, 0); - ndelay(FSI_GPIO_STD_DLY); + udelay(FSI_GPIO_STD_DLY); gpiod_set_value(master->gpio_clk, 1); } } @@ -97,7 +97,7 @@ static int sda_in(struct fsi_master_gpio *master) { int in; - ndelay(FSI_GPIO_STD_DLY); + udelay(FSI_GPIO_STD_DLY); in = gpiod_get_value(master->gpio_data); return in ? 1 : 0; }
Under high work loads the ARM core can occasionaly hit invalid timings between the FSI clock and data lines which leads to data crc errors. Add further delay between clock switch and data line changes. Signed-off-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> --- drivers/fsi/fsi-master-gpio.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)