diff mbox series

ARM:dts:aspeed Add Inspur on5263m5 BMC

Message ID 1545373529-22629-1-git-send-email-wangzqbj@inspur.com
State Changes Requested, archived
Headers show
Series ARM:dts:aspeed Add Inspur on5263m5 BMC | expand

Commit Message

John Wang Dec. 21, 2018, 6:25 a.m. UTC
Add initial version of device tree file for on5263m5 ast2500bmc

Signed-off-by: John Wang <wangzqbj@inspur.com>
---
 arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts | 146 +++++++++++++++++++++++
 1 file changed, 146 insertions(+)
 create mode 100644 arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts

Comments

Andrew Jeffery Jan. 17, 2019, 2:11 a.m. UTC | #1
Hi John,

On Fri, 21 Dec 2018, at 16:55, John Wang wrote:
> Add initial version of device tree file for on5263m5 ast2500bmc
> 
> Signed-off-by: John Wang <wangzqbj@inspur.com>
> ---
>  arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts | 146 +++++++++++++++++++++++
>  1 file changed, 146 insertions(+)
>  create mode 100644 arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts
> 
> diff --git a/arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts b/arch/
> arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts
> new file mode 100644
> index 0000000..dff1085
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts
> @@ -0,0 +1,146 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (c) 2017 Intel Corporation

Shouldn't this be Inspur?

> +/dts-v1/;
> +
> +#include "aspeed-g5.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +
> +/ {
> +	model = "ON5263M5 BMC";
> +	compatible = "inspur,on5263m5-bmc", "aspeed,ast2500";
> +
> +	chosen {
> +		stdout-path = &uart5;
> +		bootargs = "earlyprintk";
> +	};
> +
> +	memory {
> +		reg = <0x80000000 0x20000000>;
> +	};
> +
> +	reserved-memory {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		vga_memory: framebuffer@7f000000 {
> +			no-map;
> +			reg = <0x7f000000 0x01000000>;

This needs to be in the SDRAM portion of the address-space. With 512MiB of RAM and
a 16MiB VGA framebuffer  the address should be 0x9f000000. At the moment you're
scribbling on the AHB-to-LPC+ bridge mapping.

Cheers,

Andrew

> +		};
> +	};
> +	
> +	leds {
> +	    compatible = "gpio-leds";
> +	    
> +	    bmc_alive {
> +	        label = "bmc_alive";
> +		gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
> +		linux,default-trigger = "timer";
> +	    };
> +	};
> +
> +	iio-hwmon {
> +		compatible = "iio-hwmon";
> +		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
> +			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
> +	};
> +
> +};
> +
> +&fmc {
> +	status = "okay";
> +	flash@0 {
> +		status = "okay";
> +		m25p,fast-read;
> +		label = "bmc";
> +#include "openbmc-flash-layout.dtsi"
> +	};
> +};
> +
> +&spi1 {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_spi1_default>;
> +
> +	flash@0 {
> +		status = "okay";
> +		m25p,fast-read;
> +		label = "pnor";
> +	};
> +};
> +
> +&uart5 {
> +	status = "okay";
> +};
> +
> +&mac0 {
> +	status = "okay";
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_rmii1_default>;
> +	use-ncsi;
> +};
> +
> +&mac1 {
> +	status = "okay";
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
> +};
> +
> +&i2c6 {
> +	status = "okay";
> +
> +	tmp421@4e {
> +	        compatible = "ti,tmp421";
> +		reg = <0x4e>;
> +	};
> +
> +	tmp112@48 {
> +		compatible = "ti,tmp112";
> +		reg = <0x48>;
> +	};
> +	
> +	eeprom@54 {
> +		compatible = "atmel,24c64";
> +    		reg = <0x54>; 
> +		pagesize = <32>;
> +	};
> +};
> +
> +&i2c7 {
> +	status = "okay";
> +
> +	adm1278@11 {
> +		  compatible = "adi,adm1278";
> +		  reg = <0x11>;
> +	};
> +};
> +
> +&gfx {
> +	status = "okay";
> +};
> +
> +&pinctrl {
> +	aspeed,external-nodes = <&gfx &lhc>;
> +};
> +
> +&pwm_tacho {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
> +
> +	fan@0 {
> +   		reg = <0x00>;
> +   		aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;  
> + 	};
> +
> + 	fan@1 {
> +   		reg = <0x01>;
> +   		aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
> + 	};
> +};
> +
> +&adc {
> +	status = "okay";
> +};
> -- 
> 2.7.4
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts b/arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts
new file mode 100644
index 0000000..dff1085
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts
@@ -0,0 +1,146 @@ 
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2017 Intel Corporation
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+	model = "ON5263M5 BMC";
+	compatible = "inspur,on5263m5-bmc", "aspeed,ast2500";
+
+	chosen {
+		stdout-path = &uart5;
+		bootargs = "earlyprintk";
+	};
+
+	memory {
+		reg = <0x80000000 0x20000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		vga_memory: framebuffer@7f000000 {
+			no-map;
+			reg = <0x7f000000 0x01000000>;
+		};
+	};
+	
+	leds {
+	    compatible = "gpio-leds";
+	    
+	    bmc_alive {
+	        label = "bmc_alive";
+		gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
+		linux,default-trigger = "timer";
+	    };
+	};
+
+	iio-hwmon {
+		compatible = "iio-hwmon";
+		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+			<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
+	};
+
+};
+
+&fmc {
+	status = "okay";
+	flash@0 {
+		status = "okay";
+		m25p,fast-read;
+		label = "bmc";
+#include "openbmc-flash-layout.dtsi"
+	};
+};
+
+&spi1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spi1_default>;
+
+	flash@0 {
+		status = "okay";
+		m25p,fast-read;
+		label = "pnor";
+	};
+};
+
+&uart5 {
+	status = "okay";
+};
+
+&mac0 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rmii1_default>;
+	use-ncsi;
+};
+
+&mac1 {
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
+};
+
+&i2c6 {
+	status = "okay";
+
+	tmp421@4e {
+	        compatible = "ti,tmp421";
+		reg = <0x4e>;
+	};
+
+	tmp112@48 {
+		compatible = "ti,tmp112";
+		reg = <0x48>;
+	};
+	
+	eeprom@54 {
+		compatible = "atmel,24c64";
+    		reg = <0x54>; 
+		pagesize = <32>;
+	};
+};
+
+&i2c7 {
+	status = "okay";
+
+	adm1278@11 {
+		  compatible = "adi,adm1278";
+		  reg = <0x11>;
+	};
+};
+
+&gfx {
+	status = "okay";
+};
+
+&pinctrl {
+	aspeed,external-nodes = <&gfx &lhc>;
+};
+
+&pwm_tacho {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
+
+	fan@0 {
+   		reg = <0x00>;
+   		aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;  
+ 	};
+
+ 	fan@1 {
+   		reg = <0x01>;
+   		aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
+ 	};
+};
+
+&adc {
+	status = "okay";
+};