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[45.20.192.79]) by smtp.gmail.com with ESMTPSA id p7sm29848874paa.3.2016.10.14.15.15.04 (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 14 Oct 2016 15:15:04 -0700 (PDT) From: christopher.lee.bostic@gmail.com To: openbmc@lists.ozlabs.org Subject: [PATCH linux v4 14/20] drivers/fsi: CRC Utility Updates Date: Fri, 14 Oct 2016 17:14:36 -0500 Message-Id: <1476483282-85971-15-git-send-email-christopher.lee.bostic@gmail.com> X-Mailer: git-send-email 2.7.4 (Apple Git-66) In-Reply-To: <1476483282-85971-1-git-send-email-christopher.lee.bostic@gmail.com> References: <1476483282-85971-1-git-send-email-christopher.lee.bostic@gmail.com> X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: xxpetri@de.ibm.com, zahrens@us.ibm.com MIME-Version: 1.0 Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Chris Bostic Provided by Jeremy Kerr. Revise the CRC calculation utilities to take variable bit length input. Signed-off-by: Chris Bostic --- drivers/fsi/fsi-core.c | 16 +++++++++------- drivers/fsi/fsi-master.h | 21 +++++++++++++++++++++ 2 files changed, 30 insertions(+), 7 deletions(-) diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c index 10bf817..07f5034 100644 --- a/drivers/fsi/fsi-core.c +++ b/drivers/fsi/fsi-core.c @@ -111,21 +111,23 @@ static const uint8_t crc4_tab[] = { 0x1, 0x6, 0xf, 0x8, 0xa, 0xd, 0x4, 0x3, }; -static uint8_t crc4(uint32_t x) +uint8_t fsi_crc4(uint8_t c, uint64_t x, int bits) { - uint8_t c = 0; int i; + /* ALign to 4-bits */ + bits = (bits + 3) & ~0x3; + /* Calculate crc4 over four-bit nibbles, starting at the MSbit */ - for (i = 28; i >= 0; i -= 4) + for (i = bits; i >= 0; i -= 4) c = crc4_tab[c ^ ((x >> i) & 0xf)]; return c; } -static bool check_crc4(uint32_t x) +static bool check_crc4_u32(uint32_t x) { - return crc4(x) == 0; + return fsi_crc4(0, x, 32) == 0; } /* FSI slave support */ @@ -171,7 +173,7 @@ static int fsi_slave_scan(struct fsi_slave *slave) conf = be32_to_cpu(conf); - if (!check_crc4(conf)) { + if (!check_crc4_u32(conf)) { dev_warn(&slave->dev, "crc error in slave register at 0x%04x\n", i); @@ -247,7 +249,7 @@ static int fsi_slave_init(struct fsi_master *master, } chip_id = be32_to_cpu(chip_id); - if (!check_crc4(chip_id)) { + if (!check_crc4_u32(chip_id)) { dev_warn(master->dev, "slave %02x:%02x: invalid chip id CRC!\n", link, slave_id); return -EIO; diff --git a/drivers/fsi/fsi-master.h b/drivers/fsi/fsi-master.h index e75a810..cafb433 100644 --- a/drivers/fsi/fsi-master.h +++ b/drivers/fsi/fsi-master.h @@ -34,4 +34,25 @@ struct fsi_master { extern int fsi_master_register(struct fsi_master *master); extern void fsi_master_unregister(struct fsi_master *master); +/** + * crc4 helper: Given a starting crc4 state @c, calculate the crc4 vaue of @x, + * which is @bits in length. This may be required by master implementations + * that do not provide their own hardware checksums. + * + * The crc4 is performed on 4-bit chunks (which is all we need for FSI + * calculations). Typically, we'll want a starting state of 0: + * + * c = fsi_crc4(0, msg, len); + * + * To crc4 a message that includes a single start bit, initialise crc4 state + * with: + * + * c = fsi_crc4(0, 1, 1); + * + * Then update with message data: + * + * c = fsi_crc4(c, msg, len); + */ +uint8_t fsi_crc4(uint8_t c, uint64_t x, int bits); + #endif /* DRIVERS_FSI_MASTER_H */