From patchwork Sat Mar 8 19:42:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Cochran X-Patchwork-Id: 328235 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 58D3E2C009A for ; Sun, 9 Mar 2014 06:44:38 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752442AbaCHTmy (ORCPT ); Sat, 8 Mar 2014 14:42:54 -0500 Received: from mail-ee0-f44.google.com ([74.125.83.44]:33609 "EHLO mail-ee0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752419AbaCHTmw (ORCPT ); Sat, 8 Mar 2014 14:42:52 -0500 Received: by mail-ee0-f44.google.com with SMTP id e49so2372576eek.3 for ; Sat, 08 Mar 2014 11:42:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Vgi4NajoPhXwIdfFbNQQYzs0Jo3E8CtncfnqKprKiIA=; b=KLe5ZPzz3DMVN9mrBSQkHas3hlgLcBfyqi1AJ+7QQT3jcwyPyByECaFjewPwbJdE5o xuSUxBoucp3xb+wwo7KHylhWrFJ+BMhVb1ekSxXolatODNji4VnKr+xlBWdvqKtFyOp+ euMkdhWwWSV2d9voX8No3mNAmKI00dLw1LZLXZRNtOQKeXSK6RN3UcfjiG+7m3HmCcVi EuTaVV8IhxVjz/DLTDcoopzSP0tNItq3zTQy4oz+F+m9MCTDZhUS3QgPOZ5QMIGLU65S dCJC/SSKzUUUHO39rEJKfrx85yH5woa/ZvrNUnnk5w8eOG2J70jT9Jxoynf/SvoXTi/j f8Ow== X-Received: by 10.15.32.5 with SMTP id z5mr42000eeu.110.1394307770636; Sat, 08 Mar 2014 11:42:50 -0800 (PST) Received: from localhost.localdomain (089144206000.atnat0015.highway.bob.at. [89.144.206.0]) by mx.google.com with ESMTPSA id u6sm23123322eep.11.2014.03.08.11.42.45 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 08 Mar 2014 11:42:50 -0800 (PST) From: Richard Cochran To: Cc: , Ben Hutchings , Christian Riesch , David Miller , =?UTF-8?q?Stefan=20S=C3=B8rensen?= Subject: [PATCH RFC net-next v1 6/9] dp83640: correct the periodic output frequency Date: Sat, 8 Mar 2014 20:42:06 +0100 Message-Id: X-Mailer: git-send-email 1.7.10.4 In-Reply-To: References: Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The phyter driver incorrectly feeds the value of the period into what is in fact a pulse width register, resulting in the actual period being twice the dialed value. This patch fixes the issue and renames a variable to make the code at bit more clear. Signed-off-by: Richard Cochran --- drivers/net/phy/dp83640.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c index d6c1061..9e26555 100644 --- a/drivers/net/phy/dp83640.c +++ b/drivers/net/phy/dp83640.c @@ -271,7 +271,7 @@ static void periodic_output(struct dp83640_clock *clock, { struct dp83640_private *dp83640 = clock->chosen; struct phy_device *phydev = dp83640->phydev; - u32 sec, nsec, period; + u32 sec, nsec, pwidth; u16 gpio, ptp_trig, trigger, val; gpio = on ? gpio_tab[PEROUT_GPIO] : 0; @@ -296,8 +296,9 @@ static void periodic_output(struct dp83640_clock *clock, sec = clkreq->perout.start.sec; nsec = clkreq->perout.start.nsec; - period = clkreq->perout.period.sec * 1000000000UL; - period += clkreq->perout.period.nsec; + pwidth = clkreq->perout.period.sec * 1000000000UL; + pwidth += clkreq->perout.period.nsec; + pwidth /= 2; mutex_lock(&clock->extreg_lock); @@ -310,8 +311,8 @@ static void periodic_output(struct dp83640_clock *clock, ext_write(0, phydev, PAGE4, PTP_TDR, nsec >> 16); /* ns[31:16] */ ext_write(0, phydev, PAGE4, PTP_TDR, sec & 0xffff); /* sec[15:0] */ ext_write(0, phydev, PAGE4, PTP_TDR, sec >> 16); /* sec[31:16] */ - ext_write(0, phydev, PAGE4, PTP_TDR, period & 0xffff); /* ns[15:0] */ - ext_write(0, phydev, PAGE4, PTP_TDR, period >> 16); /* ns[31:16] */ + ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); /* ns[15:0] */ + ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16); /* ns[31:16] */ /*enable trigger*/ val &= ~TRIG_LOAD;