From patchwork Fri Sep 4 07:29:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 1357234 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.a=rsa-sha256 header.s=pandora-2019 header.b=eAmkxd92; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BjTp664hBz9sTR for ; Fri, 4 Sep 2020 17:29:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729688AbgIDH3d (ORCPT ); Fri, 4 Sep 2020 03:29:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726089AbgIDH31 (ORCPT ); Fri, 4 Sep 2020 03:29:27 -0400 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C88BBC061244 for ; Fri, 4 Sep 2020 00:29:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=HDDBiOH7qS8iDVhDyHgGgo7HZx7ILR/EWRFg47JcMpg=; b=eAmkxd92lP5DcDGC05Pqqn188R hOAnt0xbvaOUw419JYp+2Eh7sOXQunUfHC/XiX/YpllCv/8C/HY3AZwQ4zg1wfbC/ZPXRjs+tejO2 wP2uGYza5/fJQ74YtrYwOG9do2nIQ/1qpIEWAMogITEpFuwvZrI4GEXlQX3sn3AwVDFJDb6IQ/oNc 2T7nhWx/PSSKIjPwFILtMvNFCsVqJ0k7B2qNKB8M3AX8MNGiwyzC/nRih96QhRqBNIgZXL1H+Qm6i 554wsuqM1D0U/Z++RAiqK63O6rXQvaa3UiXUProMMjD/uhtNAtH1lyAzxI8W1nTF/Ft/G2fswKKgT eJa9SjYA==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:57908 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kE69y-0007Ou-C0; Fri, 04 Sep 2020 08:29:22 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1kE69y-00057X-4s; Fri, 04 Sep 2020 08:29:22 +0100 In-Reply-To: <20200904072828.GQ1551@shell.armlinux.org.uk> References: <20200904072828.GQ1551@shell.armlinux.org.uk> From: Russell King To: Alexandre Belloni , Antoine Tenart , Richard Cochran Cc: Matteo Croce , Andre Przywara , Sven Auhagen , "David S. Miller" , Jakub Kicinski , netdev@vger.kernel.org Subject: [PATCH net-next v2 3/6] net: mvpp2: check first level interrupt status registers MIME-Version: 1.0 Content-Disposition: inline Message-Id: Date: Fri, 04 Sep 2020 08:29:22 +0100 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Check the first level interrupt status registers to determine how to further process the port interrupt. We will need this to know whether to invoke the link status processing and/or the PTP processing for both XLG and GMAC. Reviewed-by: Andrew Lunn Signed-off-by: Russell King --- drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 4 ++++ drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 13 +++++++++++-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h index a2f787c83756..273c46bbf927 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h @@ -461,6 +461,8 @@ #define MVPP22_CTRL4_DP_CLK_SEL BIT(5) #define MVPP22_CTRL4_SYNC_BYPASS_DIS BIT(6) #define MVPP22_CTRL4_QSGMII_BYPASS_ACTIVE BIT(7) +#define MVPP22_GMAC_INT_SUM_STAT 0xa0 +#define MVPP22_GMAC_INT_SUM_STAT_INTERNAL BIT(1) #define MVPP22_GMAC_INT_SUM_MASK 0xa4 #define MVPP22_GMAC_INT_SUM_MASK_LINK_STAT BIT(1) @@ -488,6 +490,8 @@ #define MVPP22_XLG_CTRL3_MACMODESELECT_MASK (7 << 13) #define MVPP22_XLG_CTRL3_MACMODESELECT_GMAC (0 << 13) #define MVPP22_XLG_CTRL3_MACMODESELECT_10G (1 << 13) +#define MVPP22_XLG_EXT_INT_STAT 0x158 +#define MVPP22_XLG_EXT_INT_STAT_XLG BIT(1) #define MVPP22_XLG_EXT_INT_MASK 0x15c #define MVPP22_XLG_EXT_INT_MASK_XLG BIT(1) #define MVPP22_XLG_EXT_INT_MASK_GIG BIT(2) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index 41ffae8d5357..9dc8cf3d0873 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -3039,14 +3039,23 @@ static void mvpp2_isr_handle_gmac_internal(struct mvpp2_port *port) static irqreturn_t mvpp2_port_isr(int irq, void *dev_id) { struct mvpp2_port *port = (struct mvpp2_port *)dev_id; + u32 val; mvpp22_gop_mask_irq(port); if (mvpp2_port_supports_xlg(port) && mvpp2_is_xlg(port->phy_interface)) { - mvpp2_isr_handle_xlg(port); + /* Check the external status register */ + val = readl(port->base + MVPP22_XLG_EXT_INT_STAT); + if (val & MVPP22_XLG_EXT_INT_STAT_XLG) + mvpp2_isr_handle_xlg(port); } else { - mvpp2_isr_handle_gmac_internal(port); + /* If it's not the XLG, we must be using the GMAC. + * Check the summary status. + */ + val = readl(port->base + MVPP22_GMAC_INT_SUM_STAT); + if (val & MVPP22_GMAC_INT_SUM_STAT_INTERNAL) + mvpp2_isr_handle_gmac_internal(port); } mvpp22_gop_unmask_irq(port);