From patchwork Fri Apr 28 22:28:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David.Cai@microchip.com X-Patchwork-Id: 756615 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wF7mQ4DPfz9s7r for ; Sat, 29 Apr 2017 08:29:58 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1164280AbdD1W2h convert rfc822-to-8bit (ORCPT ); Fri, 28 Apr 2017 18:28:37 -0400 Received: from esa4.microchip.iphmx.com ([68.232.154.123]:46580 "EHLO esa4.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1035214AbdD1W2e (ORCPT ); Fri, 28 Apr 2017 18:28:34 -0400 X-IronPort-AV: E=Sophos;i="5.37,389,1488870000"; d="scan'208";a="2170370" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA; 28 Apr 2017 15:28:33 -0700 Received: from CHN-SV-EXMX02.mchp-main.com ([fe80::7dfe:3761:863e:3963]) by CHN-SV-EXCH04.mchp-main.com ([fe80::6150:8a42:4945:9b1b%16]) with mapi id 14.03.0181.006; Fri, 28 Apr 2017 15:28:33 -0700 From: To: , CC: , Subject: [PATCH v4 net-next]smsc911x: Adding support for Micochip LAN9250 Ethernet controller Thread-Topic: [PATCH v4 net-next]smsc911x: Adding support for Micochip LAN9250 Ethernet controller Thread-Index: AdLAbl/vKWE/PnLkS+GR0ALhxz+gLQ== Date: Fri, 28 Apr 2017 22:28:32 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.10.76.4] MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: David Cai Adding support for Microchip LAN9250 Ethernet controller. Signed-off-by: David Cai --- Changes V2 - email format changed - remove unnecessary text in commit log Changes V3 - defined all supported Ethernet controller chip ID. V4 - changed 'if (pdata->generation == 4 && pdata->sub_generation)' to 'if ((pdata->idrev & 0xFFFF0000) == LAN9250)' for more readable drivers/net/ethernet/smsc/smsc911x.c | 55 ++++++++++++++++++++++++------------ drivers/net/ethernet/smsc/smsc911x.h | 19 +++++++++++++ 2 files changed, 56 insertions(+), 18 deletions(-) diff --git a/drivers/net/ethernet/smsc/smsc911x.c b/drivers/net/ethernet/smsc/smsc911x.c index fa5ca09..0cf956d 100644 --- a/drivers/net/ethernet/smsc/smsc911x.c +++ b/drivers/net/ethernet/smsc/smsc911x.c @@ -25,7 +25,7 @@ * LAN9215, LAN9216, LAN9217, LAN9218 * LAN9210, LAN9211 * LAN9220, LAN9221 - * LAN89218 + * LAN89218,LAN9250 * */ @@ -104,6 +104,9 @@ struct smsc911x_data { /* used to decide which workarounds apply */ unsigned int generation; + /* used to decide which sub generation product work arounds to apply */ + unsigned int sub_generation; + /* device configuration (copied from platform_data during probe) */ struct smsc911x_platform_config config; @@ -1450,6 +1453,8 @@ static int smsc911x_soft_reset(struct smsc911x_data *pdata) unsigned int timeout; unsigned int temp; int ret; + unsigned int reset_offset = HW_CFG; + unsigned int reset_mask = HW_CFG_SRST_; /* * Make sure to power-up the PHY chip before doing a reset, otherwise @@ -1476,15 +1481,23 @@ static int smsc911x_soft_reset(struct smsc911x_data *pdata) } } + if ((pdata->idrev & 0xFFFF0000) == LAN9250) { + /* special reset for LAN9250 */ + reset_offset = RESET_CTL; + reset_mask = RESET_CTL_DIGITAL_RST_; + } + /* Reset the LAN911x */ - smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_); + smsc911x_reg_write(pdata, reset_offset, reset_mask); + + /* verify reset bit is cleared */ timeout = 10; do { udelay(10); - temp = smsc911x_reg_read(pdata, HW_CFG); - } while ((--timeout) && (temp & HW_CFG_SRST_)); + temp = smsc911x_reg_read(pdata, reset_offset); + } while ((--timeout) && (temp & reset_mask)); - if (unlikely(temp & HW_CFG_SRST_)) { + if (unlikely(temp & reset_mask)) { SMSC_WARN(pdata, drv, "Failed to complete reset"); return -EIO; } @@ -2253,31 +2266,37 @@ static int smsc911x_init(struct net_device *dev) pdata->idrev = smsc911x_reg_read(pdata, ID_REV); switch (pdata->idrev & 0xFFFF0000) { - case 0x01180000: - case 0x01170000: - case 0x01160000: - case 0x01150000: - case 0x218A0000: + case LAN9118: + case LAN9117: + case LAN9116: + case LAN9115: + case LAN89218: /* LAN911[5678] family */ pdata->generation = pdata->idrev & 0x0000FFFF; break; - case 0x118A0000: - case 0x117A0000: - case 0x116A0000: - case 0x115A0000: + case LAN9218: + case LAN9217: + case LAN9216: + case LAN9215: /* LAN921[5678] family */ pdata->generation = 3; break; - case 0x92100000: - case 0x92110000: - case 0x92200000: - case 0x92210000: + case LAN9210: + case LAN9211: + case LAN9220: + case LAN9221: /* LAN9210/LAN9211/LAN9220/LAN9221 */ pdata->generation = 4; break; + case LAN9250: + /* LAN9250 */ + pdata->generation = 4; + pdata->sub_generation = 1; + break; + default: SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X", pdata->idrev); diff --git a/drivers/net/ethernet/smsc/smsc911x.h b/drivers/net/ethernet/smsc/smsc911x.h index 54d6489..8d75508 100644 --- a/drivers/net/ethernet/smsc/smsc911x.h +++ b/drivers/net/ethernet/smsc/smsc911x.h @@ -20,6 +20,22 @@ #ifndef __SMSC911X_H__ #define __SMSC911X_H__ +/*Chip ID*/ +#define LAN9115 0x01150000 +#define LAN9116 0x01160000 +#define LAN9117 0x01170000 +#define LAN9118 0x01180000 +#define LAN9215 0x115A0000 +#define LAN9216 0x116A0000 +#define LAN9217 0x117A0000 +#define LAN9218 0x118A0000 +#define LAN9210 0x92100000 +#define LAN9211 0x92110000 +#define LAN9220 0x92200000 +#define LAN9221 0x92210000 +#define LAN9250 0x92500000 +#define LAN89218 0x218A0000 + #define TX_FIFO_LOW_THRESHOLD ((u32)1600) #define SMSC911X_EEPROM_SIZE ((u32)128) #define USE_DEBUG 0 @@ -303,6 +319,9 @@ #define E2P_DATA_EEPROM_DATA_ 0x000000FF #define LAN_REGISTER_EXTENT 0x00000100 +#define RESET_CTL 0x1F8 +#define RESET_CTL_DIGITAL_RST_ 0x00000001 + /* * MAC Control and Status Register (Indirect Address) * Offset (through the MAC_CSR CMD and DATA port)