From patchwork Fri Nov 14 15:17:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Frederic Sowa X-Patchwork-Id: 410867 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4C96C140082 for ; Sat, 15 Nov 2014 02:17:43 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965535AbaKNPRj (ORCPT ); Fri, 14 Nov 2014 10:17:39 -0500 Received: from out3-smtp.messagingengine.com ([66.111.4.27]:39889 "EHLO out3-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965485AbaKNPRi (ORCPT ); Fri, 14 Nov 2014 10:17:38 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 9921220C65 for ; Fri, 14 Nov 2014 10:17:37 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Fri, 14 Nov 2014 10:17:37 -0500 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d= stressinduktion.org; h=x-sasl-enc:from:to:cc:subject:date :message-id:in-reply-to:references; s=mesmtp; bh=GoKdSXjGu5XnR7O Dwfxpr1W4QCI=; b=C1rB5NlUca8e5BXLC3pHd+cW1jmbUyV+ToUIXmZdkZqCqq5 UqSBW4IICiMG+OdhArr/QgXIqIZjrfknDrzdLxj4CkL1ihmT1WWJ3VfXJGZ4d6yw ovdZYJVlArmYOUgTZ+I2B2H0HeIlUXOBVRuQS/GbJ9uE3ZH7Cbn5K/FRRuG8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d= messagingengine.com; h=x-sasl-enc:from:to:cc:subject:date :message-id:in-reply-to:references; s=smtpout; bh=GoKdSXjGu5XnR7 ODwfxpr1W4QCI=; b=js/+YiU02qbuCjpfvxZGR1TjswmjB4PulGQaCHODVF1L3i HulGuC5egNiH69ZINmD6qNrmhwxHKqxofd2Pp3bwpjxPoMNVUMBLkwy4mu08hwof KboJ+IH+2uP1ZIqHxOJ4J1EyjDPfwUDrgqk92+B1p57E0958uySS/St30RCgw= X-Sasl-enc: 6TXDRREgDIN0MuVioylkCW9QQTnKjT+mIsPqM+QnoU+q 1415978257 Received: from stressinduktion.org (unknown [217.192.177.17]) by mail.messagingengine.com (Postfix) with ESMTPA id 80E28680087; Fri, 14 Nov 2014 10:17:36 -0500 (EST) From: Hannes Frederic Sowa To: netdev@vger.kernel.org Cc: ogerlitz@mellanox.com, pshelar@nicira.com, jesse@nicira.com, jay.vosburgh@canonical.com, discuss@openvswitch.org Subject: [PATCH net-next v3] fast_hash: clobber registers correctly for inline function use Date: Fri, 14 Nov 2014 16:17:31 +0100 Message-Id: <6751d6af4301f283134a419385f65dfcf92a44ab.1415978153.git.hannes@stressinduktion.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1415976656.17262.41.camel@edumazet-glaptop2.roam.corp.google.com> References: <1415976656.17262.41.camel@edumazet-glaptop2.roam.corp.google.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org In case the arch_fast_hash call gets inlined we need to tell gcc which registers are clobbered with. rhashtable was fine, because it used arch_fast_hash via function pointer and thus the compiler took care of that. In case of openvswitch the call got inlined and arch_fast_hash touched registeres which gcc didn't know about. Also don't use conditional compilation inside arguments, as this confuses sparse. Fixes: e5a2c899957659c ("fast_hash: avoid indirect function calls") Reported-by: Jay Vosburgh Cc: Pravin Shelar Cc: Jesse Gross Signed-off-by: Hannes Frederic Sowa --- v2) After studying gcc documentation again, it occured to me that I need to specificy all input operands in the clobber section, too. Otherwise gcc can expect that the inline assembler section won't modify the inputs, which is not true. v3) added Fixes tag Bye, Hannes arch/x86/include/asm/hash.h | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/hash.h b/arch/x86/include/asm/hash.h index a881d78..a25c45a 100644 --- a/arch/x86/include/asm/hash.h +++ b/arch/x86/include/asm/hash.h @@ -23,11 +23,15 @@ static inline u32 arch_fast_hash(const void *data, u32 len, u32 seed) { u32 hash; - alternative_call(__jhash, __intel_crc4_2_hash, X86_FEATURE_XMM4_2, #ifdef CONFIG_X86_64 - "=a" (hash), "D" (data), "S" (len), "d" (seed)); + alternative_call(__jhash, __intel_crc4_2_hash, X86_FEATURE_XMM4_2, + "=a" (hash), "D" (data), "S" (len), "d" (seed) + : "rdi", "rsi", "rdx", "rcx", "r8", "r9", "r10", "r11", + "cc", "memory"); #else - "=a" (hash), "a" (data), "d" (len), "c" (seed)); + alternative_call(__jhash, __intel_crc4_2_hash, X86_FEATURE_XMM4_2, + "=a" (hash), "a" (data), "d" (len), "c" (seed) + : "edx", "ecx", "cc", "memory"); #endif return hash; } @@ -36,11 +40,15 @@ static inline u32 arch_fast_hash2(const u32 *data, u32 len, u32 seed) { u32 hash; - alternative_call(__jhash2, __intel_crc4_2_hash2, X86_FEATURE_XMM4_2, #ifdef CONFIG_X86_64 - "=a" (hash), "D" (data), "S" (len), "d" (seed)); + alternative_call(__jhash2, __intel_crc4_2_hash2, X86_FEATURE_XMM4_2, + "=a" (hash), "D" (data), "S" (len), "d" (seed) + : "rdi", "rsi", "rdx", "rcx", "r8", "r9", "r10", "r11", + "cc", "memory"); #else - "=a" (hash), "a" (data), "d" (len), "c" (seed)); + alternative_call(__jhash2, __intel_crc4_2_hash2, X86_FEATURE_XMM4_2, + "=a" (hash), "a" (data), "d" (len), "c" (seed) + : "edx", "ecx", "cc", "memory"); #endif return hash; }